[PATCH 1/6] pwm: sun4i: enable clk prior to getting its rate
Roman Beranek
roman.beranek at prusa3d.cz
Sun May 30 21:46:03 PDT 2021
Ensure the PWM clock is enabled prior to retrieving its rate, as is
already being done in sun4i_pwm_apply.
Signed-off-by: Roman Beranek <roman.beranek at prusa3d.com>
---
drivers/pwm/pwm-sun4i.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index e01becd102c0..3721b9894cf6 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -117,8 +117,15 @@ static void sun4i_pwm_get_state(struct pwm_chip *chip,
u64 clk_rate, tmp;
u32 val;
unsigned int prescaler;
+ int ret;
+ ret = clk_prepare_enable(sun4i_pwm->clk);
+ if (ret) {
+ dev_err(chip->dev, "failed to enable PWM clock\n");
+ return;
+ }
clk_rate = clk_get_rate(sun4i_pwm->clk);
+ clk_disable_unprepare(sun4i_pwm->clk);
val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
--
2.31.1
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