[PATCH v4 00/18] Tidy up cache.S

[Fuad Tabba]

Hi,

Changes since v3 [1]:
- Rebased onto v5.13-rc3
- Redid __flush_cache_range to use dcache_by_line_op (Mark)
- Remove user_alt macro (Mark)
- Tidying up some code, comments, and commit messages. (Mark)

This should cover all the feedback from v2 [2].

Changes since v2 [2]:
- Brought in Mark's patches that add conditional cache fixups, only generating
  an extable entry if a label is provided [3]. NOTE: The patches missed some of
  the code comments to reflect the changes. I took the liberty of fixing the
  comments in Mark's patch.
- Tidied up the new cache flush (clean/invalidate) macro by removing code
  duplication, conditional variables/labels. Moved the ttbr manipulation,
  fixup handler, and rets inline in __flush_cache_user_range. (Mark)
- Fixed comments and commit messages. (Mark)

Changes since v1 [4]:
- Apply ARM64_WORKAROUND_CLEAN_CACHE errata to
  swsusp_arch_suspend_exit (Mark)
- Remove toggling of uaccess from the newly created cache flush
  (clean/invalidate) macro and leave it up to the caller (Robin)
- Fix renaming of cache maintenance functions (Ard, Mark)
- Fix comment on maintenance operations in machine_kexec_post_load (Ard)
- Fix commit msg comments to clarify some of the changes and outline potential
  performance impact (Mark)
- Fix code comments that refer to flush_icache_range when the intended function
  is __flush_icache_range

As has been noted before [5], the code in cache.S isn't very tidy. Some of its
functions accept address ranges by start and size, whereas others with similar
names do so by start and end. This has resulted in at least one bug [6].

Moreover, invalidate_icache_range and __flush_icache_range toggle uaccess,
which isn't necessary because they work on kernel addresses [7].

This patch series attempts to fix these issues, as well as tidy up the code in
general to reduce ambiguity and make it consistent with Arm terminology and
with the functions' actual operations.

No functional change intended in this series. However, there might be a
performance impact due to the reduced number of instructions in general.

This series is based on v5.13-rc3. You can find the applied series here [8].

Cheers,
/fuad

[1] https://lore.kernel.org/linux-arm-kernel/20210520124406.2731873-1-tabba@google.com/
[2] https://lore.kernel.org/linux-arm-kernel/20210517075124.152151-1-tabba@google.com/
[3] https://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git/log/?h=arm64/cleanups/cache
[4] https://lore.kernel.org/linux-arm-kernel/20210511144252.3779113-1-tabba@google.com/T/
[5] https://lore.kernel.org/linux-arch/20200511075115.GA16134@willie-the-truck/
[6] https://lore.kernel.org/linux-arch/20200510075510.987823-3-hch@lst.de/
[7] https://lore.kernel.org/linux-arch/20200511110014.lb9PEahJ4hVOYrbwIb_qUHXyNy9KQzNFdb_I3YlzY6A@z/
[8] https://android-kvm.googlesource.com/linux/+/refs/heads/tabba/fixcache-5.13

Fuad Tabba (16):
  arm64: Apply errata to swsusp_arch_suspend_exit
  arm64: Do not enable uaccess for flush_icache_range
  arm64: Do not enable uaccess for invalidate_icache_range
  arm64: Downgrade flush_icache_range to invalidate
  arm64: assembler: remove user_alt
  arm64: Move documentation of dcache_by_line_op
  arm64: Fix comments to refer to correct function __flush_icache_range
  arm64: __inval_dcache_area to take end parameter instead of size
  arm64: dcache_by_line_op to take end parameter instead of size
  arm64: __flush_dcache_area to take end parameter instead of size
  arm64: __clean_dcache_area_poc to take end parameter instead of size
  arm64: __clean_dcache_area_pop to take end parameter instead of size
  arm64: __clean_dcache_area_pou to take end parameter instead of size
  arm64: sync_icache_aliases to take end parameter instead of size
  arm64: Fix cache maintenance function comments
  arm64: Rename arm64-internal cache maintenance functions

Mark Rutland (2):
  arm64: assembler: replace `kaddr` with `addr`
  arm64: assembler: add conditional cache fixups

 arch/arm64/include/asm/alternative-macros.h |   5 -
 arch/arm64/include/asm/arch_gicv3.h         |   3 +-
 arch/arm64/include/asm/assembler.h          |  80 ++++++----
 arch/arm64/include/asm/cacheflush.h         |  71 +++++----
 arch/arm64/include/asm/efi.h                |   2 +-
 arch/arm64/include/asm/kvm_mmu.h            |   7 +-
 arch/arm64/kernel/alternative.c             |   2 +-
 arch/arm64/kernel/efi-entry.S               |   9 +-
 arch/arm64/kernel/head.S                    |  13 +-
 arch/arm64/kernel/hibernate-asm.S           |   7 +-
 arch/arm64/kernel/hibernate.c               |  20 ++-
 arch/arm64/kernel/idreg-override.c          |   3 +-
 arch/arm64/kernel/image-vars.h              |   2 +-
 arch/arm64/kernel/insn.c                    |   2 +-
 arch/arm64/kernel/kaslr.c                   |  12 +-
 arch/arm64/kernel/machine_kexec.c           |  30 ++--
 arch/arm64/kernel/probes/uprobes.c          |   2 +-
 arch/arm64/kernel/smp.c                     |   8 +-
 arch/arm64/kernel/smp_spin_table.c          |   7 +-
 arch/arm64/kernel/sys_compat.c              |   2 +-
 arch/arm64/kvm/arm.c                        |   2 +-
 arch/arm64/kvm/hyp/nvhe/cache.S             |   4 +-
 arch/arm64/kvm/hyp/nvhe/setup.c             |   3 +-
 arch/arm64/kvm/hyp/nvhe/tlb.c               |   2 +-
 arch/arm64/kvm/hyp/pgtable.c                |  13 +-
 arch/arm64/lib/uaccess_flushcache.c         |   4 +-
 arch/arm64/mm/cache.S                       | 158 ++++++++++----------
 arch/arm64/mm/flush.c                       |  29 ++--
 28 files changed, 282 insertions(+), 220 deletions(-)


base-commit: c4681547bcce777daf576925a966ffa824edd09d
-- 
2.31.1.818.g46aad6cb9e-goog