[PATCH V2 06/18] ARM64: dts: imx8: change i2c irq number to non-combined

[Aisheng Dong]

> From: Clark Wang <xiaoning.wang at nxp.com>
> Sent: Tuesday, April 6, 2021 7:33 PM
> 
> Combined interrupt number may cause unexcepted irq event when using DMA
> and too many interrupts will be generated.
> So change all i2c interrupts number to non-combined for imx8qxp/8qm/8dxl.

Still no mx8dxl support in upstream, I guess imx8 is enough.
BTW, pls changing tile format as below as pointed by Shawn in another patch:
arm64: dts: xxxx

Otherwise:
Reviewed-by: Dong Aisheng <aisheng.dong at nxp.com>

Regards
Aisheng

> 
> Signed-off-by: Clark Wang <xiaoning.wang at nxp.com>
> ---
> V2 changes:
>  - New patch added in V2
> ---
>  arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> index b5ed12a06538..9ba57f04859b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
> @@ -110,7 +110,7 @@ uart3_lpcg: clock-controller at 5a490000 {
> 
>  	i2c0: i2c at 5a800000 {
>  		reg = <0x5a800000 0x4000>;
> -		interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
>  		interrupt-parent = <&gic>;
>  		clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c0_lpcg IMX_LPCG_CLK_4>;
> @@ -123,7 +123,7 @@ i2c0: i2c at 5a800000 {
> 
>  	i2c1: i2c at 5a810000 {
>  		reg = <0x5a810000 0x4000>;
> -		interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
>  		interrupt-parent = <&gic>;
>  		clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c1_lpcg IMX_LPCG_CLK_4>;
> @@ -136,7 +136,7 @@ i2c1: i2c at 5a810000 {
> 
>  	i2c2: i2c at 5a820000 {
>  		reg = <0x5a820000 0x4000>;
> -		interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
>  		interrupt-parent = <&gic>;
>  		clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c2_lpcg IMX_LPCG_CLK_4>;
> @@ -149,7 +149,7 @@ i2c2: i2c at 5a820000 {
> 
>  	i2c3: i2c at 5a830000 {
>  		reg = <0x5a830000 0x4000>;
> -		interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
>  		interrupt-parent = <&gic>;
>  		clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>,
>  			 <&i2c3_lpcg IMX_LPCG_CLK_4>;
> --
> 2.25.1