[PATCH v2 04/16] arm64: Downgrade flush_icache_range to invalidate
Ard Biesheuvel
ardb at kernel.org
Tue May 18 09:02:32 PDT 2021
On Tue, 18 May 2021 at 17:53, Mark Rutland <mark.rutland at arm.com> wrote:
>
> On Mon, May 17, 2021 at 08:51:12AM +0100, Fuad Tabba wrote:
> > Since __flush_dcache_area is called right before,
> > invalidate_icache_range is sufficient in this case.
> >
> > Rewrite the comment to better explain the rationale behind the
> > cache maintenance operations used here.
> >
> > No functional change intended.
> > Possible performance impact due to invalidating only the icache
> > rather than invalidating and cleaning both caches.
> >
> > Reported-by: Catalin Marinas <catalin.marinas at arm.com>
> > Reported-by: Will Deacon <will at kernel.org>
> > Link: https://lore.kernel.org/linux-arch/20200511110014.lb9PEahJ4hVOYrbwIb_qUHXyNy9KQzNFdb_I3YlzY6A@z/
> > Signed-off-by: Fuad Tabba <tabba at google.com>
> > ---
> > arch/arm64/kernel/machine_kexec.c | 10 +++++++---
> > 1 file changed, 7 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c
> > index 90a335c74442..ecd8915e02e1 100644
> > --- a/arch/arm64/kernel/machine_kexec.c
> > +++ b/arch/arm64/kernel/machine_kexec.c
> > @@ -68,10 +68,14 @@ int machine_kexec_post_load(struct kimage *kimage)
> > kimage->arch.kern_reloc = __pa(reloc_code);
> > kexec_image_info(kimage);
> >
> > - /* Flush the reloc_code in preparation for its execution. */
> > + /*
> > + * For execution with the MMU off and I-cache on, reloc_code needs to be
> > + * cleaned to the PoC and invalidated from the I-cache.
> > + */
>
> Minor nit, but the I-cache is *always* on (SCTLR.I affects the
> attributes used for fetches into the I-caches), so it would be slightly
> better to drop the "and I-cache on" words.
>
This may be true, but it may not be obvious to someone reading the
'MMU off' part of the comment. Bottom line is that we will be running
in a mode where we may hit in the I-cache, so it needs to be
invalidated. If we miss in the I-cache, we should fetch from the PoC,
hence the D-cache clean.
> Otherwise, this looks good to me.
>
> Mark.
>
> > __flush_dcache_area(reloc_code, arm64_relocate_new_kernel_size);
> > - flush_icache_range((uintptr_t)reloc_code, (uintptr_t)reloc_code +
> > - arm64_relocate_new_kernel_size);
> > + invalidate_icache_range((uintptr_t)reloc_code,
> > + (uintptr_t)reloc_code +
> > + arm64_relocate_new_kernel_size);
> >
> > return 0;
> > }
> > --
> > 2.31.1.751.gd2f1c929bd-goog
> >
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