[PATCH v3 7/7] ARM: dts: sun8i: V3: add I2S interface to V3 dts

[Tobias Schramm]

The Allwinner V3 SoC features an I2S interface. The I2S peripheral is
identical to that in the Allwinner H3 SoC.
This commit adds it to the Allwinner V3 dts.

Signed-off-by: Tobias Schramm <t.schramm at manjaro.org>
---
 arch/arm/boot/dts/sun8i-v3.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
index 8af790d286b9..3698e024d604 100644
--- a/arch/arm/boot/dts/sun8i-v3.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3.dtsi
@@ -1,10 +1,31 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (C) 2019 Icenowy Zheng <icenowy at aosc.io>
+ * Copyright (C) 2021 Tobias Schramm <t.schramm at manjaro.org>
  */
 
 #include "sun8i-v3s.dtsi"
 
+/ {
+	soc {
+			i2s0: i2s at 1c22000 {
+				#sound-dai-cells = <0>;
+				compatible = "allwinner,sun8i-v3-i2s",
+					     "allwinner,sun8i-h3-i2s";
+				reg = <0x01c22000 0x400>;
+				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+				clock-names = "apb", "mod";
+				dmas = <&dma 3>, <&dma 3>;
+				dma-names = "rx", "tx";
+				pinctrl-names = "default";
+				pinctrl-0 = <&i2s0_pins>;
+				resets = <&ccu RST_BUS_I2S0>;
+				status = "disabled";
+			};
+	};
+};
+
 &ccu {
 	compatible = "allwinner,sun8i-v3-ccu";
 };
@@ -30,6 +51,11 @@ external_mdio: mdio at 2 {
 &pio {
 	compatible = "allwinner,sun8i-v3-pinctrl";
 
+	i2s0_pins: i2s0-pins {
+		pins = "PG10", "PG11", "PG12", "PG13";
+		function = "i2s";
+	};
+
 	uart1_pg_pins: uart1-pg-pins {
 		pins = "PG6", "PG7";
 		function = "uart1";
-- 
2.31.1