[PATCH v13 2/4] arm64: dts: mt8183: Add node for the Mali GPU
Ezequiel Garcia
ezequiel at vanguardiasur.com.ar
Thu May 13 07:51:53 PDT 2021
Hi Nicolas,
On Wed, 21 Apr 2021 at 02:29, Nicolas Boichat <drinkcat at chromium.org> wrote:
>
> Add a basic GPU node for mt8183.
>
> Signed-off-by: Nicolas Boichat <drinkcat at chromium.org>
> ---
> The binding we use with out-of-tree Mali drivers includes more
> clocks, this is used for devfreq: the out-of-tree driver switches
> clk_mux to clk_sub_parent (26Mhz), adjusts clk_main_parent, then
> switches clk_mux back to clk_main_parent:
> (see https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.19/drivers/gpu/arm/midgard/platform/mediatek/mali_kbase_runtime_pm.c#423)
> clocks =
> <&topckgen CLK_TOP_MFGPLL_CK>,
> <&topckgen CLK_TOP_MUX_MFG>,
> <&clk26m>,
> <&mfgcfg CLK_MFG_BG3D>;
> clock-names =
> "clk_main_parent",
> "clk_mux",
> "clk_sub_parent",
> "subsys_mfg_cg";
> (based on discussions, this probably belongs in the clock core)
>
> This only matters for devfreq, that is disabled anyway as we don't
> have platform-specific code to handle >1 supplies.
>
Nit: I think some of this info could be relevant, so I'd make
it part of the commit description.
> (no changes since v12)
>
> Changes in v12:
> - Add gpu node to mt8183-pumpkin.dts as well (Neil Armstrong).
>
> Changes in v11:
> - mt8183*.dts: remove incorrect supply-names
>
> Changes in v6:
> - Add gpu regulators to kukui dtsi as well.
> - Power domains are now attached to spm, not scpsys
> - Drop R-B.
>
> Changes in v5:
> - Rename "2d" power domain to "core2" (keep R-B again).
>
> Changes in v4:
> - Add power-domain-names to describe the 3 domains.
> (kept Alyssa's reviewed-by as the change is minor)
>
> Changes in v2:
> - Use sram instead of mali_sram as SRAM supply name.
> - Rename mali@ to gpu at .
>
> arch/arm64/boot/dts/mediatek/mt8183-evb.dts | 5 +
> .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 5 +
> .../boot/dts/mediatek/mt8183-pumpkin.dts | 5 +
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 105 ++++++++++++++++++
> 4 files changed, 120 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> index edff1e03e6fe..7bc0a6a7fadf 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts
> @@ -42,6 +42,11 @@ &auxadc {
> status = "okay";
> };
>
> +&gpu {
> + mali-supply = <&mt6358_vgpu_reg>;
> + sram-supply = <&mt6358_vsram_gpu_reg>;
> +};
> +
> &i2c0 {
> pinctrl-names = "default";
> pinctrl-0 = <&i2c_pins_0>;
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> index ff56bcfa3370..e4e54be1c2b2 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi
> @@ -279,6 +279,11 @@ dsi_out: endpoint {
> };
> };
>
> +&gpu {
> + mali-supply = <&mt6358_vgpu_reg>;
> + sram-supply = <&mt6358_vsram_gpu_reg>;
> +};
> +
> &i2c0 {
> pinctrl-names = "default";
> pinctrl-0 = <&i2c0_pins>;
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts
> index 0aff5eb52e88..ee912825cfc6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts
> @@ -68,6 +68,11 @@ &auxadc {
> status = "okay";
> };
>
> +&gpu {
> + mali-supply = <&mt6358_vgpu_reg>;
> + sram-supply = <&mt6358_vsram_gpu_reg>;
> +};
> +
> &i2c0 {
> pinctrl-names = "default";
> pinctrl-0 = <&i2c_pins_0>;
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index c5e822b6b77a..c75fdeea8aa4 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -1118,6 +1118,111 @@ mfgcfg: syscon at 13000000 {
> #clock-cells = <1>;
> };
>
> + gpu: gpu at 13040000 {
> + compatible = "mediatek,mt8183-mali", "arm,mali-bifrost";
> + reg = <0 0x13040000 0 0x4000>;
> + interrupts =
> + <GIC_SPI 280 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 279 IRQ_TYPE_LEVEL_LOW>,
> + <GIC_SPI 278 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "job", "mmu", "gpu";
> +
> + clocks = <&topckgen CLK_TOP_MFGPLL_CK>;
> +
> + power-domains =
> + <&spm MT8183_POWER_DOMAIN_MFG_CORE0>,
> + <&spm MT8183_POWER_DOMAIN_MFG_CORE1>,
> + <&spm MT8183_POWER_DOMAIN_MFG_2D>;
> + power-domain-names = "core0", "core1", "core2";
> +
> + operating-points-v2 = <&gpu_opp_table>;
> + };
> +
> + gpu_opp_table: opp_table0 {
If my eyes don't fool me, the OPP table being here means it's a child
of the "soc" node. Given it's not an SoC peripheral,
it'd make more sense to move it to root "/".
Other than that, I think it looks good:
Reviewed-by: Ezequiel Garcia <ezequiel at collabora.com>
Thanks!
Ezequiel
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