[PATCH 2/3] arm64: acpi: Map EFI_MEMORY_WT memory as Normal-NC

[Mark Rutland]

On Thu, May 06, 2021 at 11:46:41AM +0100, Will Deacon wrote:
> On Thu, May 06, 2021 at 11:20:45AM +0100, Mark Rutland wrote:
> > On Thu, May 06, 2021 at 10:50:33AM +0100, Will Deacon wrote:
> > > The only user we have of Normal Write-Through memory is in the ACPI code
> > > when mapping memory regions advertised as EFI_MEMORY_WT. Since most (all?)
> > > CPUs treat write-through as non-cacheable under the hood, don't bother
> > > with the extra memory type here and just treat EFI_MEMORY_WT the same way
> > > as EFI_MEMORY_WC by mapping it to the Normal-NC memory type instead.
> > 
> > The UEFI spec explicitly defines EFI_MEMORY_WT as Normal Outer-WT
> > Inner-WT (and even explicitly specifies the MAIR.Attr<n> value).
> 
> I wonder if they just did that because the names match :(
> 
> > In the UEFI 2.9 spec, see section 2.3.6.1 "Memory types", Table 2-5
> > "Map: EFI Cacheability Attributes to AArch64 Memory Types".
> > 
> > The UEFI 2.9 spec can be found at:
> > 
> >   https://uefi.org/sites/default/files/resources/UEFI_Spec_2_9_2021_03_18.pdf
> > 
> > Given that is specified explicitly, and given that we don't know how
> > future CPUs will treat this equivalently, I don't think this change is
> > architecturally sound and I don't think there's wiggle-room to read the
> > spec as permitting this.
> 
> At the same time, allocating a MAIR for this memory type just because the
> UEFI spec permits some theoretical future firmware to use it on some
> theoretical CPU design is pretty farcical in my opinion. Looking through
> current TRMs I've not been able to find a CPU that doesn't just emit
> Normal-NC for this memory type.
> 
> How about I add a pr_warn() in this case, so that we can revisit it in the
> unlikely event that it ever comes up as an issue?

If we also could avoid mapping EFI_MEMORY_WT to anything, that'd be
nicer, but just the warning is probably good enough, yes.

Thanks,
Mark.