[PATCH] arm64: entry: always set GIC_PRIO_PSR_I_SET during entry

[Catalin Marinas]

On Wed, 28 Apr 2021 12:15:55 +0100, Mark Rutland wrote:
> Zenghui reports that booting a kernel with "irqchip.gicv3_pseudo_nmi=1"
> on the command line hits a warning during kernel entry, due to the way
> we manipulate the PMR.
> 
> Early in the entry sequence, we call lockdep_hardirqs_off() to inform
> lockdep that interrupts have been masked (as the HW sets DAIF wqhen
> entering an exception). Architecturally PMR_EL1 is not affected by
> exception entry, and we don't set GIC_PRIO_PSR_I_SET in the PMR early in
> the exception entry sequence, so early in exception entry the PMR can
> indicate that interrupts are unmasked even though they are masked by
> DAIF.
> 
> [...]

Applied to arm64 (for-next/core), thanks!

[1/1] arm64: entry: always set GIC_PRIO_PSR_I_SET during entry
      https://git.kernel.org/arm64/c/4d6a38da8e79

-- 
Catalin