[PATCH mvebu v3 03/10] clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock

[Gregory CLEMENT]

Pali Rohár <pali at kernel.org> writes:

> From: Marek Behún <kabel at kernel.org>
>
> Remove the .set_parent method in clk_pm_cpu_ops.
>
> This method was supposed to be needed by the armada-37xx-cpufreq driver,
> but was never actually called due to wrong assumptions in the cpufreq
> driver. After this was fixed in the cpufreq driver, this method is not
> needed anymore.
>
> Signed-off-by: Marek Behún <kabel at kernel.org>
> Acked-by: Stephen Boyd <sboyd at kernel.org>
> Tested-by: Pali Rohár <pali at kernel.org>
> Tested-by: Tomasz Maciej Nowak <tmn505 at gmail.com>
> Tested-by: Anders Trier Olesen <anders.trier.olesen at gmail.com>
> Tested-by: Philip Soares <philips at netisense.com>
> Fixes: 2089dc33ea0e ("clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks")

Acked-by: Gregory CLEMENT <gregory.clement at bootlin.com>

Thanks,

Gregory
> ---
>  drivers/clk/mvebu/armada-37xx-periph.c | 28 --------------------------
>  1 file changed, 28 deletions(-)
>
> diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c
> index f5746f9ea929..6507bd2c5f31 100644
> --- a/drivers/clk/mvebu/armada-37xx-periph.c
> +++ b/drivers/clk/mvebu/armada-37xx-periph.c
> @@ -440,33 +440,6 @@ static u8 clk_pm_cpu_get_parent(struct clk_hw *hw)
>  	return val;
>  }
>  
> -static int clk_pm_cpu_set_parent(struct clk_hw *hw, u8 index)
> -{
> -	struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw);
> -	struct regmap *base = pm_cpu->nb_pm_base;
> -	int load_level;
> -
> -	/*
> -	 * We set the clock parent only if the DVFS is available but
> -	 * not enabled.
> -	 */
> -	if (IS_ERR(base) || armada_3700_pm_dvfs_is_enabled(base))
> -		return -EINVAL;
> -
> -	/* Set the parent clock for all the load level */
> -	for (load_level = 0; load_level < LOAD_LEVEL_NR; load_level++) {
> -		unsigned int reg, mask,  val,
> -			offset = ARMADA_37XX_NB_TBG_SEL_OFF;
> -
> -		armada_3700_pm_dvfs_update_regs(load_level, &reg, &offset);
> -
> -		val = index << offset;
> -		mask = ARMADA_37XX_NB_TBG_SEL_MASK << offset;
> -		regmap_update_bits(base, reg, mask, val);
> -	}
> -	return 0;
> -}
> -
>  static unsigned long clk_pm_cpu_recalc_rate(struct clk_hw *hw,
>  					    unsigned long parent_rate)
>  {
> @@ -592,7 +565,6 @@ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate,
>  
>  static const struct clk_ops clk_pm_cpu_ops = {
>  	.get_parent = clk_pm_cpu_get_parent,
> -	.set_parent = clk_pm_cpu_set_parent,
>  	.round_rate = clk_pm_cpu_round_rate,
>  	.set_rate = clk_pm_cpu_set_rate,
>  	.recalc_rate = clk_pm_cpu_recalc_rate,
> -- 
> 2.20.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com