[PATCH 0/3] Fix Footbridge PCI I/O resources

[Russell King - ARM Linux admin]

This series fixes the PCI I/O resources for the Footbridge platforms
which were broken quite some time ago by misinterpretation of what
pcibios_min_io actually means, and the introduction of bus level PCI
I/O resources.

The changes become a particular problem when a Southbridge is present
on the PCI bus, which is a PCI-to-ISA bridge, and hence is where all
the ISA resources live. It is made worse when you have an IDE
controller which operates in legacy mode, with resources at the
0x170/0x1f0/0x376/0x3f6 addresses.

Worse than that, the previous changes removed the CSR I/O resource
allocation entirely, setting the 21285 to respond to I/O transactions
at bus address 0, which may overlap ISA resources on the Southbridge.

This series fixes the resource problems by restoring the old behaviour
via a flag that omits the PCI I/O resource, enabling this flag for all
footbridge platforms, and restoring the allocation of the CSR I/O
resource. This approach offers minimal impact for other platforms.

 arch/arm/include/asm/mach/pci.h          |  1 +
 arch/arm/kernel/bios32.c                 | 37 +++++++++++++++++++-------------
 arch/arm/mach-footbridge/cats-pci.c      |  1 +
 arch/arm/mach-footbridge/dc21285.c       | 15 ++++++++++++-
 arch/arm/mach-footbridge/ebsa285-pci.c   |  1 +
 arch/arm/mach-footbridge/netwinder-pci.c |  1 +
 arch/arm/mach-footbridge/personal-pci.c  |  1 +
 7 files changed, 41 insertions(+), 16 deletions(-)

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!