[PATCH v2 08/13] dt-bindings: imx: gpcv2: add support for optional resets

[Adam Ford]

On Tue, Nov 17, 2020 at 8:11 AM Lucas Stach <l.stach at pengutronix.de> wrote:
>
> Am Montag, den 09.11.2020, 14:15 -0600 schrieb Rob Herring:
> > On Thu, Nov 05, 2020 at 06:44:29PM +0100, Lucas Stach wrote:
> > > For some domains the resets of the devices in the domain are not
> > > automatically triggered. Add an optional resets property to allow
> > > the GPC driver to trigger those resets explicitly.
> > >
> > > Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
> > > ---
> > >  Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml | 7 +++++++
> > >  1 file changed, 7 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
> > > index a96e6dbf1858..4330c73a2c30 100644
> > > --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
> > > +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml
> > > @@ -66,6 +66,13 @@ properties:
> > >
> > >            power-supply: true
> > >
> > > +          resets:
> > > +            description: |
> > > +              A number of phandles to resets that need to be asserted during
> > > +              power-up sequencing of the domain.
> > > +            minItems: 1
> > > +            maxItems: 4
> >
> > You need to define what each reset is.
>
> I can't. The resets belong to devices located inside the power domain,
> which need to be held in reset across the power-up sequence. So I have
> no means to specify what each reset is in a generic power-domain
> binding. Same situation as with the clocks in this binding actually.
>

Rob,

Do you have any guidance on how we might be able to give you want you
want so we can move forward?  This power-domain driver will be used
for a variety of Freescale/NXP IMX SoC's, and looking at other power
domain controllers [1], they don't explicitly define what each reset
is.  Since the resets for this family vary from SoC to SoC, the number
of resets will change from one SoC to another.  If you could give us a
suggestion or an example of a board that has the power-domain resets
do what you ask, it would help move this forward.  Without this
driver, several boards are unable to use a significant number of
peripherals.

adam
[1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml?h=v5.12-rc4

> Regards,
> Lucas
>