[PATCH] drm/mediatek: fine tune the data lane trail by project dts
Chun-Kuang Hu
chunkuang.hu at kernel.org
Thu Mar 18 00:31:02 GMT 2021
Hi, Jitao:
Jitao Shi <jitao.shi at mediatek.com> 於 2021年2月1日 週一 上午11:48寫道:
>
> Some panels or bridges require customized hs_da_trail time.
> So add a property in devicetree for this panels and bridges.
>
> Signed-off-by: Jitao Shi <jitao.shi at mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 10 +++++++++-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 8c70ec39bfe1..6e7092fa2fee 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -194,6 +194,7 @@ struct mtk_dsi {
> struct clk *hs_clk;
>
> u32 data_rate;
> + u32 da_trail_delta;
>
> unsigned long mode_flags;
> enum mipi_dsi_pixel_format format;
> @@ -234,7 +235,7 @@ static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi)
> timing->da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000;
> timing->da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 -
> timing->da_hs_prepare;
> - timing->da_hs_trail = timing->da_hs_prepare + 1;
> + timing->da_hs_trail = timing->da_hs_prepare + 1 + dsi->da_trail_delta;
>
> timing->ta_go = 4 * timing->lpx - 2;
> timing->ta_sure = timing->lpx + 2;
> @@ -1094,6 +1095,13 @@ static int mtk_dsi_probe(struct platform_device *pdev)
> goto err_unregister_host;
> }
>
> + ret = of_property_read_u32_index(dev->of_node, "da_trail_delta", 0,
> + &dsi->da_trail_delta);
This value depends on panel, so I think we should get some value from
panel's device node to calculate this value.
Regards,
Chun-Kuang.
> + if (ret) {
> + dev_info(dev, "Can't get da_trail_delta, keep it as 0: %d\n", ret);
> + dsi->da_trail_delta = 0;
> + }
> +
> comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DSI);
> if (comp_id < 0) {
> dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
> --
> 2.12.5
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