[PATCH v5 04/15] dt-bindings: add BCM6328 pincontroller binding documentation
Rob Herring
robh at kernel.org
Mon Mar 8 22:44:58 GMT 2021
On Sat, Mar 06, 2021 at 04:57:01PM +0100, Álvaro Fernández Rojas wrote:
> Add binding documentation for the pincontrol core found in BCM6328 SoCs.
>
> Signed-off-by: Jonas Gorski <jonas.gorski at gmail.com>
> Co-developed-by: Jonas Gorski <jonas.gorski at gmail.com>
> Signed-off-by: Álvaro Fernández Rojas <noltari at gmail.com>
> ---
> v5: change Documentation to dt-bindings in commit title
> v4: no changes
> v3: add new gpio node
> v2: remove interrupts
>
> .../pinctrl/brcm,bcm6328-pinctrl.yaml | 171 ++++++++++++++++++
> 1 file changed, 171 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml
> new file mode 100644
> index 000000000000..d4e3c7897f19
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml
> @@ -0,0 +1,171 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6328-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Broadcom BCM6328 pin controller
> +
> +maintainers:
> + - Álvaro Fernández Rojas <noltari at gmail.com>
> + - Jonas Gorski <jonas.gorski at gmail.com>
> +
> +description: |+
> + The pin controller node should be the child of a syscon node.
> +
> + Refer to the the bindings described in
> + Documentation/devicetree/bindings/mfd/syscon.yaml
> +
> +properties:
> + compatible:
> + const: brcm,bcm6328-pinctrl
> +
> +patternProperties:
> + '^gpio$':
Not a pattern, move to 'properties'
> + type: object
> + properties:
> + compatible:
> + const: brcm,bcm6328-gpio
> +
> + data:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Offset in the register map for the data register (in bytes).
> +
> + dirout:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + Offset in the register map for the dirout register (in bytes).
> +
> + gpio-controller: true
> +
> + "#gpio-cells":
> + const: 2
> +
> + gpio-ranges:
> + maxItems: 1
> +
> + required:
> + - gpio-controller
> + - gpio-ranges
> + - '#gpio-cells'
> +
> + '^.*$':
> + if:
> + type: object
> + then:
Instead of this hack (which shouldn't work because 'gpio' is also a
node), use some defined node name pattern (e.g. '-pins$')
You need an 'additionalProperties: false' at this level.
> + properties:
> + function:
> + $ref: "/schemas/types.yaml#/definitions/string"
Reference the pinctrl schemas which define these properties.
> + enum: [ serial_led_data, serial_led_clk, inet_act_led, pcie_clkreq,
> + led, ephy0_act_led, ephy1_act_led, ephy2_act_led,
> + ephy3_act_led, hsspi_cs1, usb_device_port, usb_host_port ]
> +
> + pins:
> + $ref: "/schemas/types.yaml#/definitions/string"
> + enum: [ gpio6, gpio7, gpio11, gpio16, gpio17, gpio18, gpio19,
> + gpio20, gpio25, gpio26, gpio27, gpio28, hsspi_cs1,
> + usb_port1 ]
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + gpio_cntl at 10000080 {
> + compatible = "syscon", "simple-mfd";
syscon needs a specific compatible for the SoC block.
What else is in this block besides pinctrl?
> + reg = <0x10000080 0x80>;
> +
> + pinctrl: pinctrl {
> + compatible = "brcm,bcm6328-pinctrl";
Is there a register range of just pinctrl registers? If so, add 'reg'
and define the sub-range.
> +
> + gpio {
> + compatible = "brcm,bcm6328-gpio";
> + data = <0xc>;
> + dirout = <0x4>;
> +
> + gpio-controller;
> + gpio-ranges = <&pinctrl 0 0 32>;
> + #gpio-cells = <2>;
> + };
> +
> + pinctrl_serial_led: serial_led {
> + pinctrl_serial_led_data: serial_led_data {
> + function = "serial_led_data";
> + pins = "gpio6";
> + };
> +
> + pinctrl_serial_led_clk: serial_led_clk {
> + function = "serial_led_clk";
> + pins = "gpio7";
> + };
> + };
> +
> + pinctrl_inet_act_led: inet_act_led {
> + function = "inet_act_led";
> + pins = "gpio11";
> + };
> +
> + pinctrl_pcie_clkreq: pcie_clkreq {
> + function = "pcie_clkreq";
> + pins = "gpio16";
> + };
> +
> + pinctrl_ephy0_spd_led: ephy0_spd_led {
> + function = "led";
> + pins = "gpio17";
> + };
> +
> + pinctrl_ephy1_spd_led: ephy1_spd_led {
> + function = "led";
> + pins = "gpio18";
> + };
> +
> + pinctrl_ephy2_spd_led: ephy2_spd_led {
> + function = "led";
> + pins = "gpio19";
> + };
> +
> + pinctrl_ephy3_spd_led: ephy3_spd_led {
> + function = "led";
> + pins = "gpio20";
> + };
> +
> + pinctrl_ephy0_act_led: ephy0_act_led {
> + function = "ephy0_act_led";
> + pins = "gpio25";
> + };
> +
> + pinctrl_ephy1_act_led: ephy1_act_led {
> + function = "ephy1_act_led";
> + pins = "gpio26";
> + };
> +
> + pinctrl_ephy2_act_led: ephy2_act_led {
> + function = "ephy2_act_led";
> + pins = "gpio27";
> + };
> +
> + pinctrl_ephy3_act_led: ephy3_act_led {
> + function = "ephy3_act_led";
> + pins = "gpio28";
> + };
> +
> + pinctrl_hsspi_cs1: hsspi_cs1 {
> + function = "hsspi_cs1";
> + pins = "hsspi_cs1";
> + };
> +
> + pinctrl_usb_port1_device: usb_port1_device {
> + function = "usb_device_port";
> + pins = "usb_port1";
> + };
> +
> + pinctrl_usb_port1_host: usb_port1_host {
> + function = "usb_host_port";
> + pins = "usb_port1";
> + };
> + };
> + };
> --
> 2.20.1
>
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