[PATCH] arm64: dts: zynqmp: Add power domain for the DisplayPort DMA controller

[Rajan Vaja]

Hi Michal,

> -----Original Message-----
> From: Michal Simek <michal.simek at xilinx.com>
> Sent: Monday, March 8, 2021 3:00 AM
> To: Rajan Vaja <RAJANV at xilinx.com>; Laurent Pinchart
> <laurent.pinchart at ideasonboard.com>; linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH] arm64: dts: zynqmp: Add power domain for the DisplayPort
> DMA controller
> 
> Hi,
> 
> On 3/8/21 11:58 AM, Rajan Vaja wrote:
> > Hi,
> >
> >> -----Original Message-----
> >> From: Michal Simek <michal.simek at xilinx.com>
> >> Sent: Monday, March 8, 2021 2:09 AM
> >> To: Laurent Pinchart <laurent.pinchart at ideasonboard.com>; linux-arm-
> >> kernel at lists.infradead.org; Rajan Vaja <RAJANV at xilinx.com>
> >> Cc: Michal Simek <michals at xilinx.com>
> >> Subject: Re: [PATCH] arm64: dts: zynqmp: Add power domain for the
> DisplayPort
> >> DMA controller
> >>
> >> Hi,
> >>
> >> On 3/7/21 12:09 AM, Laurent Pinchart wrote:
> >>> The DisplayPort DMA controller (DPDMA) is located in the same power
> >>> domain as the DisplayPort Subsystem (DPSUB). Specify the power domain in
> >>> the device tree.
> >>>
> >>> Signed-off-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
> >>> ---
> >>>
> >>> I'm actually not entirely sure about the truthfulness of the commit
> >>> message, as I haven't been able to located this information in the
> >>> reference manual. Nonetheless, without this patch, I get a clock enable
> >>> failure when starting the display:
> >>>
> >>> [   70.517104] zynqmp_pll_enable() clock enable failed for vpll_int, ret = -22
> >>> [   70.527552] zynqmp-dpsub fd4a0000.display: failed to enable a pixel clock
> >>>
> >>> I'm thus quite confident the patch is correct. If anyone has more
> >>> information and would like to reword the commit message, please feel
> >>> free to do so.
> >>>
> >>>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 +
> >>>  1 file changed, 1 insertion(+)
> >>>
> >>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> >> b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> >>> index c113c76f360d..dc5c3a09c77e 100644
> >>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> >>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> >>> @@ -749,6 +749,7 @@ zynqmp_dpdma: dma-controller at fd4c0000 {
> >>>  			interrupts = <0 122 4>;
> >>>  			interrupt-parent = <&gic>;
> >>>  			clock-names = "axi_clk";
> >>> +			power-domains = <&zynqmp_firmware PD_DP>;
> >>>  			#dma-cells = <1>;
> >>>  		};
> >>>
> >>>
> >>
> >> Rajan: Can you please comment this?
> > [Rajan] Change looks fine to me. If power-domain entry is not present in device
> tree node, that device would not be requested and hence clock control would
> fail.
> 
> The key point here is if DPDMA is in also in PD_DP or there is separate
> one. And can you please send any tag? acked-by, etc?
[Rajan] There is no separate node for DPDMA. DPDMA clock is bind to DP device in firmware.

> 
> Thanks,
> Michal