[PATCH] arm64: dts: zynqmp: Add power domain for the DisplayPort DMA controller

Laurent Pinchart laurent.pinchart at ideasonboard.com
Sat Mar 6 23:09:15 GMT 2021


The DisplayPort DMA controller (DPDMA) is located in the same power
domain as the DisplayPort Subsystem (DPSUB). Specify the power domain in
the device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
---

I'm actually not entirely sure about the truthfulness of the commit
message, as I haven't been able to located this information in the
reference manual. Nonetheless, without this patch, I get a clock enable
failure when starting the display:

[   70.517104] zynqmp_pll_enable() clock enable failed for vpll_int, ret = -22
[   70.527552] zynqmp-dpsub fd4a0000.display: failed to enable a pixel clock

I'm thus quite confident the patch is correct. If anyone has more
information and would like to reword the commit message, please feel
free to do so.

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index c113c76f360d..dc5c3a09c77e 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -749,6 +749,7 @@ zynqmp_dpdma: dma-controller at fd4c0000 {
 			interrupts = <0 122 4>;
 			interrupt-parent = <&gic>;
 			clock-names = "axi_clk";
+			power-domains = <&zynqmp_firmware PD_DP>;
 			#dma-cells = <1>;
 		};
 
-- 
Regards,

Laurent Pinchart




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