[PATCH] irqchip/irq-mst: Support polarity configuration

[Marc Zyngier]

On Sat, 06 Mar 2021 17:06:51 +0000,
Daniel Palmer <daniel at 0x0f.com> wrote:
> 
> Hi Mark-PK,
> 
> I'm trying to understand the logic behind the changes.
> It seems like the polarity of interrupts is always the same between
> the MStar intc and the GIC? Low level interrupts are handled in the
> mstar intc and become high level interrupts to the GIC?

That's because the GIC only supports level-high input interrupts when
they are level triggered (and rising edge when edge triggered).

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.