[PATCH 1/8] ARM: ARMv7-M: Fix register restore corrupt after svc call
dillon.minfei at gmail.com
dillon.minfei at gmail.com
Wed Mar 3 08:05:10 GMT 2021
From: dillon min <dillon.minfei at gmail.com>
For some case, kernel not boot by u-boot(single thread),
but by rtos , as most rtos use pendsv to do context switch.
So, we need add an lr check after svc call, to find out should
use psp or msp. else register restore after svc call might be
corrupted.
Fixes: b70cd406d7fe ("ARM: 8671/1: V7M: Preserve registers across switch from Thread to Handler mode")
Signed-off-by: dillon min <dillon.minfei at gmail.com>
---
arch/arm/mm/proc-v7m.S | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 84459c1d31b8..c93d2757312d 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -137,7 +137,10 @@ __v7m_setup_cont:
1: cpsid i
/* Calculate exc_ret */
orr r10, lr, #EXC_RET_THREADMODE_PROCESSSTACK
- ldmia sp, {r0-r3, r12}
+ tst lr, #EXC_RET_STACK_MASK
+ mrsne r4, psp
+ moveq r4, sp
+ ldmia r4!, {r0-r3, r12}
str r5, [r12, #11 * 4] @ restore the original SVC vector entry
mov lr, r6 @ restore LR
--
2.7.4
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