[PATCH v2 2/2] arm64: dts: fsl: add support for Kontron pitx-imx8m board

Fabio Estevam festevam at gmail.com
Tue Mar 2 14:43:24 GMT 2021


Hi Heiko,

On Mon, Feb 22, 2021 at 11:08 AM Heiko Thiery <heiko.thiery at gmail.com> wrote:

> +       reg_usdhc2_vmmc: regulator-v-3v3-sd {

reg_usdhc2_vmmc: regulator-usdhc2-vmmc {

> +       tpm_reset: tpm-reset {
> +               compatible = "gpio-reset";

I don't see this compatible string documented.

> +               reset-gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
> +               reset-delay-us = <2>;
> +               reset-post-delay-ms = <60>;
> +               #reset-cells = <0>;
> +       };
> +
> +       usb_hub_reset: usb-hub-reset {
> +               compatible = "gpio-reset";

Same here.

> +&fec1 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_fec1>;
> +       phy-mode = "rgmii-id";
> +       phy-handle = <&ethphy0>;
> +       phy-reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;

This property is deprecated. Please consider using reset-gpios inside
ethernet-phy instead.

> +       /* TODO: configure audio, as of now just put a placeholder */
> +       wm8904: audio-codec at 1a {
> +               compatible = "wlf,wm8904";
> +               reg = <0x1a>;
> +               clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
> +               clock-names = "mclk";
> +               clock-frequency = <24000000>;

Not a valid property.

> +/* M.2 B-key slot */
> +&pcie0 {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_pcie0>;
> +       disable-gpio = <&gpio5 29 GPIO_ACTIVE_LOW>;

Not a valid property.

> +       reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
> +       clocks = <&clk IMX8MQ_CLK_PCIE1_ROOT>,
> +                <&clk IMX8MQ_CLK_PCIE1_AUX>,
> +                <&clk IMX8MQ_CLK_PCIE1_PHY>,
> +                <&pcie0_refclk>;
> +       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> +       ext_osc = <1>;

Not a valid property.

> +/* Intel Ethernet Controller I210/I211 */
> +&pcie1 {
> +       clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
> +                <&clk IMX8MQ_CLK_PCIE2_AUX>,
> +                <&clk IMX8MQ_CLK_PCIE2_PHY>,
> +                <&pcie1_refclk>;
> +       clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> +       ext_osc = <1>;

Not a valid property.



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