[PATCH v2 3/3] ARM: cache-v7: get rid of mini-stack

[Ard Biesheuvel]

On Mon, 1 Mar 2021 at 16:53, Russell King - ARM Linux admin
<linux at armlinux.org.uk> wrote:
>
> On Wed, Feb 10, 2021 at 07:55:32PM +0100, Ard Biesheuvel wrote:
> > Now that we have reduced the number of registers that we need to
> > preserve when calling v7_invalidate_l1 from the boot code, we can use
> > scratch registers to preserve the remaining ones, and get rid of the
> > mini stack entirely. This works around any issues regarding cache
> > behavior in relation to the uncached accesses to this memory, which is
> > hard to get right in the general case (i.e., both bare metal and under
> > virtualization)
> >
> > While at it, switch v7_invalidate_l1 to using ip as a scratch register
> > instead of r4. This makes the function AAPCS compliant, and removes the
> > need to stash r4 in ip across the call.
>
> You don't mention that we only do this for MP capable cores, which
> is in itself quite a big change - maybe that change should be a
> separate commit?
>

I'm not quite sure I understand what you are referring to here. All
call sites are updated to use the macro to call v7_invalidate_l1(), so
I don't think the UP-only and SMP-capable setup() paths are treated
any differently.