[PATCH v2 0/3] ARM: v7: get rid of boot time mini stack

Linus Walleij linus.walleij at linaro.org
Mon Mar 1 14:38:15 GMT 2021


On Wed, Feb 10, 2021 at 7:55 PM Ard Biesheuvel <ardb at kernel.org> wrote:

> The v7 boot code uses a small chunk of BSS to preserve some register
> contents across a call to v7_invalidate_l1 that occurs with the MMU and
> caches disabled. Memory accesses in such cases are tricky on v7+, given
> that the architecture permits some unintuitive behaviors (it is
> implementation defined whether accesses done with the MMU and caches off
> may hit in the caches). Also, cache invalidation is not safe under
> virtualization if the intent is to retain stores issued directly to DRAM,
> as the hypervisor may upgrade invalidate operations to clean+invalidate,
> resulting in DRAM contents to be overwritte by the dirty cachelines that
> we were trying to evict in the first place.
>
> So let's address this issue, by removing the need for this stack to
> exist in the first place: v7_invalidate_l1 can be rewritten to use fewer
> registers, which means fewer registers need to be preserved, and we have
> enough spare registers available.
>
> Patch #1 adds a missing ISB. This patch is included separately so it can
> be backported if desired.
>
> Patch #2 rewrites v7_invalidate_l1 so it only uses 5 registers (not
> counting lr which it must preserve as well)
>
> Patch #3 updates the callers to use spare registers instead of the mini
> stack to stash the values that need to be preserved across the calls to
> v7_invalidate_l1.
>
> Changes since v1:
> - use correct stop condition in outer loop (cc not mi)
> - bring back ENDPROC() in patch #3
> - add Nico's ack

This looks good to me, so FWIW:
Acked-by: Linus Walleij <linus.walleij at linaro.org>

Yours,
Linus Walleij



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