[PATCH 05/27] arm64: dts: mt8195: add spmi node
Tinghan Shen
tinghan.shen at mediatek.com
Tue Jun 15 10:32:11 PDT 2021
From: Henry Chen <henryc.chen at mediatek.com>
Add spmi node to SOC MT8195.
Signed-off-by: Henry Chen <henryc.chen at mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index bbb1e008e522..965445d07e92 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -334,6 +334,21 @@
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC_D10>;
};
+ spmi: spmi at 10027000 {
+ compatible = "mediatek,mt8195-spmi";
+ reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+ <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+ <&topckgen CLK_TOP_SPMI_M_MST_SEL>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC_D10>;
+ };
+
uart0: serial at 11001100 {
compatible = "mediatek,mt8195-uart", "mediatek,mt6577-uart";
reg = <0 0x11001100 0 0x100>;
--
2.18.0
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