[PATCH v4 08/20] arm64: entry: organise entry handlers consistently
Mark Rutland
mark.rutland at arm.com
Mon Jun 7 02:46:12 PDT 2021
In entry.S we have two comments which distinguish EL0 and EL1 exception
handlers, but the code isn't actually laid out to match, and there are a
few other inconsistencies that would be good to clear up.
This patch organizes the entry handers consistently:
* The handlers are laid out in order of the vectors, to make them easier
to navigate.
* The inconsistently-applied alignment is removed
* The handlers are consistently marked with SYM_CODE_START_LOCAL()
rather than SYM_CODE_START_LOCAL_NOALIGN(), giving them the same
default alignment as other assembly code snippets.
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland at arm.com>
Acked-by: Catalin Marinas <catalin.marinas at arm.com>
Acked-by: Marc Zyngier <maz at kernel.org>
Reviewed-by: Joey Gouly <joey.gouly at arm.com>
Cc: James Morse <james.morse at arm.com>
Cc: Will Deacon <will at kernel.org>
---
arch/arm64/kernel/entry.S | 78 ++++++++++++++++++++++-------------------------
1 file changed, 36 insertions(+), 42 deletions(-)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 8eb3a0a51413..ed7c55d57afe 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -607,65 +607,88 @@ SYM_CODE_END(el1_error_invalid)
/*
* EL1 mode handlers.
*/
- .align 6
-SYM_CODE_START_LOCAL_NOALIGN(el1_sync)
+SYM_CODE_START_LOCAL(el1_sync)
kernel_entry 1
mov x0, sp
bl el1_sync_handler
kernel_exit 1
SYM_CODE_END(el1_sync)
- .align 6
-SYM_CODE_START_LOCAL_NOALIGN(el1_irq)
+SYM_CODE_START_LOCAL(el1_irq)
kernel_entry 1
mov x0, sp
bl el1_irq_handler
kernel_exit 1
SYM_CODE_END(el1_irq)
-SYM_CODE_START_LOCAL_NOALIGN(el1_fiq)
+SYM_CODE_START_LOCAL(el1_fiq)
kernel_entry 1
mov x0, sp
bl el1_fiq_handler
kernel_exit 1
SYM_CODE_END(el1_fiq)
+SYM_CODE_START_LOCAL(el1_error)
+ kernel_entry 1
+ mov x0, sp
+ bl el1_error_handler
+ kernel_exit 1
+SYM_CODE_END(el1_error)
+
/*
* EL0 mode handlers.
*/
- .align 6
-SYM_CODE_START_LOCAL_NOALIGN(el0_sync)
+SYM_CODE_START_LOCAL(el0_sync)
kernel_entry 0
mov x0, sp
bl el0_sync_handler
b ret_to_user
SYM_CODE_END(el0_sync)
+SYM_CODE_START_LOCAL(el0_irq)
+ kernel_entry 0
+ mov x0, sp
+ bl el0_irq_handler
+ b ret_to_user
+SYM_CODE_END(el0_irq)
+
+SYM_CODE_START_LOCAL(el0_fiq)
+ kernel_entry 0
+ mov x0, sp
+ bl el0_fiq_handler
+ b ret_to_user
+SYM_CODE_END(el0_fiq)
+
+SYM_CODE_START_LOCAL(el0_error)
+ kernel_entry 0
+ mov x0, sp
+ bl el0_error_handler
+ b ret_to_user
+SYM_CODE_END(el0_error)
+
#ifdef CONFIG_COMPAT
- .align 6
-SYM_CODE_START_LOCAL_NOALIGN(el0_sync_compat)
+SYM_CODE_START_LOCAL(el0_sync_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_sync_compat_handler
b ret_to_user
SYM_CODE_END(el0_sync_compat)
- .align 6
-SYM_CODE_START_LOCAL_NOALIGN(el0_irq_compat)
+SYM_CODE_START_LOCAL(el0_irq_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_irq_compat_handler
b ret_to_user
SYM_CODE_END(el0_irq_compat)
-SYM_CODE_START_LOCAL_NOALIGN(el0_fiq_compat)
+SYM_CODE_START_LOCAL(el0_fiq_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_fiq_compat_handler
b ret_to_user
SYM_CODE_END(el0_fiq_compat)
-SYM_CODE_START_LOCAL_NOALIGN(el0_error_compat)
+SYM_CODE_START_LOCAL(el0_error_compat)
kernel_entry 0, 32
mov x0, sp
bl el0_error_compat_handler
@@ -673,35 +696,6 @@ SYM_CODE_START_LOCAL_NOALIGN(el0_error_compat)
SYM_CODE_END(el0_error_compat)
#endif
- .align 6
-SYM_CODE_START_LOCAL_NOALIGN(el0_irq)
- kernel_entry 0
- mov x0, sp
- bl el0_irq_handler
- b ret_to_user
-SYM_CODE_END(el0_irq)
-
-SYM_CODE_START_LOCAL_NOALIGN(el0_fiq)
- kernel_entry 0
- mov x0, sp
- bl el0_fiq_handler
- b ret_to_user
-SYM_CODE_END(el0_fiq)
-
-SYM_CODE_START_LOCAL(el1_error)
- kernel_entry 1
- mov x0, sp
- bl el1_error_handler
- kernel_exit 1
-SYM_CODE_END(el1_error)
-
-SYM_CODE_START_LOCAL(el0_error)
- kernel_entry 0
- mov x0, sp
- bl el0_error_handler
- b ret_to_user
-SYM_CODE_END(el0_error)
-
/*
* "slow" syscall return path.
*/
--
2.11.0
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