[RFC PATCH v2 00/10] irqchip/irq-gic: Optimize masking by leveraging EOImode=1

[Valentin Schneider]

On 27/05/21 12:17, Marc Zyngier wrote:
> On Tue, 25 May 2021 18:32:45 +0100,
> Valentin Schneider <valentin.schneider at arm.com> wrote:
>> I've tested this on my Ampere eMAG, which uncovered "fun" interactions with
>> the MSI domains. Did the same trick as the Juno with the pl011.
>>
>> pNMIs cause said eMAG to freeze, but that's true even without my patches. I
>> did try them out under QEMU+KVM and that looked fine, although that means I
>> only got to test EOImode=0. I'll try to dig into this when I get some more
>> cycles.
>
> That's interesting/worrying. As far as I remember, this machine uses
> GIC500, which is a well known quantity. If pNMIs are causing issues,
> that'd probably be a CPU interface problem. Can you elaborate on how
> you tried to test that part? Just using the below benchmark?
>

Not even that, it would hang somewhere at boot. Julien suggested offline
that it might be a problem with the secondaries' PMR initial value, but I
really never got to do dig into it.

>>
>> Performance impact
>> ==================
>>
>> Benchmark
>> +++++++++
>>
>> Finding a benchmark that leverages a force-threaded IRQ has proved to be
>> somewhat of a pain, so I crafted my own. It's a bit daft, but so are most
>> benchmarks (though this one might win a prize).
>
> I love it (and wrote similar hacks in my time)! :D

Yay!

> Can you put that up
> somewhere so that I can run the same test on my own zoo and find out
> how it fares?
>

The setup part is really fugly and I was too ashamed of it to link it in
the cover letter; for ACPI I could simply use acpi_register_gsi() since
that uses the right domain by default, but for DT I ended up adding a DT
entry and a match table.

I'll see about unifying this and I'll send it out your way.