[PATCH v2 09/11] memory: mtk-smi: mt8195: Add smi support
Ikjoon Jang
ikjn at chromium.org
Wed Jul 21 05:39:31 PDT 2021
On Thu, Jul 15, 2021 at 8:22 PM Yong Wu <yong.wu at mediatek.com> wrote:
>
> MT8195 has two smi-common, their IP are the same. Only the larbs that
> connect with the smi-common are different. thus the bus_sel are different
> for the two smi-common.
>
> Signed-off-by: Yong Wu <yong.wu at mediatek.com>
Reviewed-by: Ikjoon Jang <ikjn at chromium.org>
> ---
> drivers/memory/mtk-smi.c | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
> index e5a34b3952a0..3c288716a378 100644
> --- a/drivers/memory/mtk-smi.c
> +++ b/drivers/memory/mtk-smi.c
> @@ -250,6 +250,10 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = {
> .config_port = mtk_smi_larb_config_port_gen2_general,
> };
>
> +static const struct mtk_smi_larb_gen mtk_smi_larb_mt8195 = {
> + .config_port = mtk_smi_larb_config_port_gen2_general,
> +};
> +
> static const struct of_device_id mtk_smi_larb_of_ids[] = {
> {.compatible = "mediatek,mt2701-smi-larb", .data = &mtk_smi_larb_mt2701},
> {.compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712},
> @@ -258,6 +262,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = {
> {.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},
> {.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},
> {.compatible = "mediatek,mt8192-smi-larb", .data = &mtk_smi_larb_mt8192},
> + {.compatible = "mediatek,mt8195-smi-larb", .data = &mtk_smi_larb_mt8195},
> {}
> };
>
> @@ -430,6 +435,21 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = {
> F_MMU1_LARB(6),
> };
>
> +static const struct mtk_smi_common_plat mtk_smi_common_mt8195_vdo = {
> + .type = MTK_SMI_GEN2,
> + .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(3) | F_MMU1_LARB(5) |
> + F_MMU1_LARB(7),
> +};
> +
> +static const struct mtk_smi_common_plat mtk_smi_common_mt8195_vpp = {
> + .type = MTK_SMI_GEN2,
> + .bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(7),
> +};
> +
> +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8195 = {
> + .type = MTK_SMI_GEN2_SUB_COMM,
> +};
> +
> static const struct of_device_id mtk_smi_common_of_ids[] = {
> {.compatible = "mediatek,mt2701-smi-common", .data = &mtk_smi_common_gen1},
> {.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
> @@ -438,6 +458,9 @@ static const struct of_device_id mtk_smi_common_of_ids[] = {
> {.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},
> {.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},
> {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192},
> + {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo},
> + {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},
> + {.compatible = "mediatek,mt8195-smi-sub-common", .data = &mtk_smi_sub_common_mt8195},
> {}
> };
>
> --
> 2.18.0
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