[PATCH v2 3/4] ARM: dts: am335x-sancloud-bbe-lite: New devicetree
Paul Barker
paul.barker at sancloud.com
Tue Jul 20 01:39:27 PDT 2021
This adds support for the Sancloud BBE Lite which shares a common
hardware base with the non-Lite version of the BBE.
Signed-off-by: Paul Barker <paul.barker at sancloud.com>
---
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/am335x-sancloud-bbe-lite.dts | 50 +++++++++++++++++++
2 files changed, 51 insertions(+)
create mode 100644 arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 863347b6b65e..8da525e7f0ab 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -843,6 +843,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-pocketbeagle.dtb \
am335x-regor-rdk.dtb \
am335x-sancloud-bbe.dtb \
+ am335x-sancloud-bbe-lite.dtb \
am335x-shc.dtb \
am335x-sbc-t335.dtb \
am335x-sl50.dtb \
diff --git a/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts b/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
new file mode 100644
index 000000000000..d6ef19311a91
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-sancloud-bbe-lite.dts
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2021 SanCloud Ltd
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-boneblack-common.dtsi"
+#include "am335x-sancloud-bbe-common.dtsi"
+
+/ {
+ model = "SanCloud BeagleBone Enhanced Lite";
+ compatible = "sancloud,am335x-boneenhanced",
+ "ti,am335x-bone-black",
+ "ti,am335x-bone",
+ "ti,am33xx";
+};
+
+&am33xx_pinmux {
+ bb_spi0_pins: pinmux_bb_spi0_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT, MUX_MODE0)
+ >;
+ };
+};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bb_spi0_pins>;
+
+ channel at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "micron,spi-authenta";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+};
--
2.26.2
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