[PATCH 2/2] arm64: dts: imx8mm-venice: Fix the SPI chipselect polarity
Tim Harvey
tharvey at gateworks.com
Fri Jul 16 07:51:44 PDT 2021
On Fri, Jul 16, 2021 at 6:29 AM Fabio Estevam <festevam at gmail.com> wrote:
>
> The conversion of the spi-imx driver to use GPIO descriptors
> in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> helped to detect the following SPI chipselect polarity mismatch on an
> imx6q-sabresd for example:
>
> [ 4.854337] m25p80 at 0 enforce active low on chipselect handle
>
> Prior to the above commit, the chipselect polarity passed via cs-gpios
> property was ignored and considered active-low.
>
> The reason for such mismatch is clearly explained in the comments inside
> drivers/gpio/gpiolib-of.c:
>
> * SPI children have active low chip selects
> * by default. This can be specified negatively
> * by just omitting "spi-cs-high" in the
> * device node, or actively by tagging on
> * GPIO_ACTIVE_LOW as flag in the device
> * tree. If the line is simultaneously
> * tagged as active low in the device tree
> * and has the "spi-cs-high" set, we get a
> * conflict and the "spi-cs-high" flag will
> * take precedence.
>
> To properly represent the SPI chipselect polarity, change it to active-low
> when the "spi-cs-high" property is absent.
>
> Signed-off-by: Fabio Estevam <festevam at gmail.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi | 2 +-
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi | 2 +-
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> index 905b68a3daa5..138bb8c9bf56 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi
> @@ -57,7 +57,7 @@ reg_usb_otg1_vbus: regulator-usb-otg1 {
> &ecspi2 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_spi2>;
> - cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
> + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> index b7c91bdc21dd..27afa46a253a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
> @@ -76,7 +76,7 @@ reg_usb_otg2_vbus: regulator-usb-otg2 {
> &ecspi2 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_spi2>;
> - cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
> + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> status = "okay";
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> index d2ffd62a3bd4..a59e849c7be2 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
> @@ -96,7 +96,7 @@ reg_wifi_en: regulator-wifi-en {
> &ecspi2 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_spi2>;
> - cs-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>;
> + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> status = "okay";
> };
>
> --
> 2.25.1
>
Fabio,
Thanks for finding this and submitting the patch!
Reviewed-By: Tim Harvey <tharvey at gateworks.com>
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