[PATCH] arm64/kexec: Test page size support with new TGRAN range values
kernel test robot
lkp at intel.com
Mon Jul 12 09:07:59 PDT 2021
Hi Anshuman,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on arm64/for-next/core]
[also build test ERROR on arm/for-next soc/for-next kvmarm/next v5.14-rc1 next-20210712]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Anshuman-Khandual/arm64-kexec-Test-page-size-support-with-new-TGRAN-range-values/20210712-110329
base: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/core
config: arm64-buildonly-randconfig-r005-20210712 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/48b74d46210916db21b8f568b92f1771827bffe9
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Anshuman-Khandual/arm64-kexec-Test-page-size-support-with-new-TGRAN-range-values/20210712-110329
git checkout 48b74d46210916db21b8f568b92f1771827bffe9
# save the attached .config to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross O=build_dir ARCH=arm64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
All errors (new ones prefixed by >>):
arch/arm64/kernel/head.S: Assembler messages:
>> arch/arm64/kernel/head.S:705: Error: undefined symbol ID_AA64MMFR0_TGRAM64_SUPPORTED_MAX used as an immediate value
vim +705 arch/arm64/kernel/head.S
5b1cfe3a0ba74c Will Deacon 2019-08-27 669
bb9052744f4b7a Suzuki K Poulose 2016-02-23 670 /*
bb9052744f4b7a Suzuki K Poulose 2016-02-23 671 * The booting CPU updates the failed status @__early_cpu_boot_status,
bb9052744f4b7a Suzuki K Poulose 2016-02-23 672 * with MMU turned off.
bb9052744f4b7a Suzuki K Poulose 2016-02-23 673 *
bb9052744f4b7a Suzuki K Poulose 2016-02-23 674 * update_early_cpu_boot_status tmp, status
bb9052744f4b7a Suzuki K Poulose 2016-02-23 675 * - Corrupts tmp1, tmp2
bb9052744f4b7a Suzuki K Poulose 2016-02-23 676 * - Writes 'status' to __early_cpu_boot_status and makes sure
bb9052744f4b7a Suzuki K Poulose 2016-02-23 677 * it is committed to memory.
bb9052744f4b7a Suzuki K Poulose 2016-02-23 678 */
bb9052744f4b7a Suzuki K Poulose 2016-02-23 679
bb9052744f4b7a Suzuki K Poulose 2016-02-23 680 .macro update_early_cpu_boot_status status, tmp1, tmp2
bb9052744f4b7a Suzuki K Poulose 2016-02-23 681 mov \tmp2, #\status
adb4907007445a Ard Biesheuvel 2016-04-15 682 adr_l \tmp1, __early_cpu_boot_status
adb4907007445a Ard Biesheuvel 2016-04-15 683 str \tmp2, [\tmp1]
bb9052744f4b7a Suzuki K Poulose 2016-02-23 684 dmb sy
bb9052744f4b7a Suzuki K Poulose 2016-02-23 685 dc ivac, \tmp1 // Invalidate potentially stale cache line
bb9052744f4b7a Suzuki K Poulose 2016-02-23 686 .endm
bb9052744f4b7a Suzuki K Poulose 2016-02-23 687
9703d9d7f77ce1 Catalin Marinas 2012-03-05 688 /*
8b0a95753a34b5 Ard Biesheuvel 2015-03-17 689 * Enable the MMU.
9703d9d7f77ce1 Catalin Marinas 2012-03-05 690 *
8b0a95753a34b5 Ard Biesheuvel 2015-03-17 691 * x0 = SCTLR_EL1 value for turning on the MMU.
693d5639b44a8f Jun Yao 2018-09-24 692 * x1 = TTBR1_EL1 value
8b0a95753a34b5 Ard Biesheuvel 2015-03-17 693 *
9dcf7914ae2386 Ard Biesheuvel 2016-08-31 694 * Returns to the caller via x30/lr. This requires the caller to be covered
9dcf7914ae2386 Ard Biesheuvel 2016-08-31 695 * by the .idmap.text section.
4bf8b96ed3f7e1 Suzuki K. Poulose 2015-10-19 696 *
4bf8b96ed3f7e1 Suzuki K. Poulose 2015-10-19 697 * Checks if the selected granule size is supported by the CPU.
4bf8b96ed3f7e1 Suzuki K. Poulose 2015-10-19 698 * If it isn't, park the CPU
9703d9d7f77ce1 Catalin Marinas 2012-03-05 699 */
c63d9f82db9439 Mark Brown 2020-02-18 700 SYM_FUNC_START(__enable_mmu)
693d5639b44a8f Jun Yao 2018-09-24 701 mrs x2, ID_AA64MMFR0_EL1
693d5639b44a8f Jun Yao 2018-09-24 702 ubfx x2, x2, #ID_AA64MMFR0_TGRAN_SHIFT, 4
26f55386f964ce James Morse 2021-03-10 703 cmp x2, #ID_AA64MMFR0_TGRAN_SUPPORTED_MIN
26f55386f964ce James Morse 2021-03-10 704 b.lt __no_granule_support
26f55386f964ce James Morse 2021-03-10 @705 cmp x2, #ID_AA64MMFR0_TGRAN_SUPPORTED_MAX
26f55386f964ce James Morse 2021-03-10 706 b.gt __no_granule_support
693d5639b44a8f Jun Yao 2018-09-24 707 update_early_cpu_boot_status 0, x2, x3
693d5639b44a8f Jun Yao 2018-09-24 708 adrp x2, idmap_pg_dir
693d5639b44a8f Jun Yao 2018-09-24 709 phys_to_ttbr x1, x1
693d5639b44a8f Jun Yao 2018-09-24 710 phys_to_ttbr x2, x2
693d5639b44a8f Jun Yao 2018-09-24 711 msr ttbr0_el1, x2 // load TTBR0
c812026c54cfae Steve Capper 2019-08-07 712 offset_ttbr1 x1, x3
693d5639b44a8f Jun Yao 2018-09-24 713 msr ttbr1_el1, x1 // load TTBR1
9703d9d7f77ce1 Catalin Marinas 2012-03-05 714 isb
8cc8a32415364e Marc Zyngier 2021-02-08 715
8cc8a32415364e Marc Zyngier 2021-02-08 716 set_sctlr_el1 x0
8cc8a32415364e Marc Zyngier 2021-02-08 717
9dcf7914ae2386 Ard Biesheuvel 2016-08-31 718 ret
c63d9f82db9439 Mark Brown 2020-02-18 719 SYM_FUNC_END(__enable_mmu)
4bf8b96ed3f7e1 Suzuki K. Poulose 2015-10-19 720
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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