[PATCH] arm64: mte: switch GCR_EL1 on task switch rather than entry/exit

[Catalin Marinas]

On Thu, Jul 01, 2021 at 08:19:22PM -0700, Peter Collingbourne wrote:
> Accessing GCR_EL1 and issuing an ISB can be expensive on some
> microarchitectures. To avoid taking this performance hit on every
> kernel entry/exit, switch GCR_EL1 on task switch rather than
> entry/exit.

Is it the ISB that's causing issues or the MRS/MSR as well? I think we
can avoid the ISB when PtrAuth is enabled by shuffling the entry code a
bit. We can also simplify the mte_set_gcr macro to avoid an MRS.

-- 
Catalin