[PATCH v2 06/13] KVM: arm64: Add feature register flag definitions
Will Deacon
will at kernel.org
Thu Jul 1 06:22:44 PDT 2021
On Tue, Jun 15, 2021 at 02:39:43PM +0100, Fuad Tabba wrote:
> Add feature register flag definitions to clarify which features
> might be supported.
>
> No functional change intended.
>
> Signed-off-by: Fuad Tabba <tabba at google.com>
> ---
> arch/arm64/include/asm/sysreg.h | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 65d15700a168..42bcc5102d10 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -789,6 +789,10 @@
> #define ID_AA64PFR0_FP_SUPPORTED 0x0
> #define ID_AA64PFR0_ASIMD_NI 0xf
> #define ID_AA64PFR0_ASIMD_SUPPORTED 0x0
> +#define ID_AA64PFR0_EL3_64BIT_ONLY 0x1
> +#define ID_AA64PFR0_EL3_32BIT_64BIT 0x2
> +#define ID_AA64PFR0_EL2_64BIT_ONLY 0x1
> +#define ID_AA64PFR0_EL2_32BIT_64BIT 0x2
> #define ID_AA64PFR0_EL1_64BIT_ONLY 0x1
> #define ID_AA64PFR0_EL1_32BIT_64BIT 0x2
> #define ID_AA64PFR0_EL0_64BIT_ONLY 0x1
Maybe just consolidate all of these into two definitions:
#define ID_AA64PFR0_ELx_64BIT_ONLY 0x1
#define ID_AA64PFR0_ELx_32BIT_64BIT 0x2
?
Will
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