[PATCH v5 4/4] ARM: Add support for Hisilicon Kunpeng L3 cache controller

[Russell King - ARM Linux admin]

On Fri, Jan 29, 2021 at 03:23:27PM +0800, Leizhen (ThunderTown) wrote:
> On 2021/1/28 22:24, Arnd Bergmann wrote:
> > I see that cache-l2x0 uses raw_spin_lock_irqsave() instead of
> > spin_lock_irqsave(), to avoid preemption in the middle of a cache
> > operation. This is probably a good idea here as well.
> 
> I don't think there's any essential difference between the two! I don't know
> if the compiler or tool will do anything extra. I checked the git log of the
> l2x0 driver and it used raw_spin_lock_irqsave() at the beginning. Maybe
> there's a description in 2.6. Since you mentioned this potential risk, I'll
> change it to raw_spin_lock_irqsave.

See bd31b85960a7 ("locking, ARM: Annotate low level hw locks as raw")

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