[PATCH 1/2] KVM: arm64: Turn kvm_arm_support_pmu_v3() into a static key
Andre Przywara
andre.przywara at arm.com
Thu Jan 28 13:42:31 EST 2021
On Thu, 28 Jan 2021 16:56:01 +0000
Marc Zyngier <maz at kernel.org> wrote:
> On 2021-01-28 15:16, Andre Przywara wrote:
> > On Tue, 26 Jan 2021 15:15:20 +0000
> > Marc Zyngier <maz at kernel.org> wrote:
> >
> > Hi Marc,
> >
> >> We currently find out about the presence of a HW PMU (or the handling
> >> of that PMU by perf, which amounts to the same thing) in a fairly
> >> roundabout way, by checking the number of counters available to perf.
> >> That's good enough for now, but we will soon need to find about about
> >> that on paths where perf is out of reach (in the world switch).
> >>
> >> Instead, let's turn kvm_arm_support_pmu_v3() into a static key.
> >
> > I am sure the pesky build bot has told you about it already, but this
> > fails when ARM_PMU is not defined, as perf_num_counters() is not
> > defined. It's bit nasty, since it's a generic function, so we
> > can't easily stub it in its original header.
>
> No sign from the bot yet, but that's indeed a problem. Well spotted.
>
> > Shall we find a place somewhere in arch/arm64 and provide a stub
> > implementation there, #ifndef CONFIG_ARM_PMU? Sounds ugly, though.
> >
> > Or something else entirely?
>
> How about:
>
> diff --git a/arch/arm64/kvm/perf.c b/arch/arm64/kvm/perf.c
> index 198fa4266b2d..739164324afe 100644
> --- a/arch/arm64/kvm/perf.c
> +++ b/arch/arm64/kvm/perf.c
> @@ -55,7 +55,7 @@ int kvm_perf_init(void)
> * hardware performance counters. This could ensure the presence of
> * a physical PMU and CONFIG_PERF_EVENT is selected.
> */
> - if (perf_num_counters() > 0)
> + if (IS_ENABLED(CONFIG_ARM_PMU) && perf_num_counters() > 0)
Neat!
That indeed compiles and works in both cases (w/ and w/o ARM_PMU),
fixing the original BUG I saw when using this as the L1 kernel.
Thanks!
Andre
> static_branch_enable(&kvm_arm_pmu_available);
>
> return perf_register_guest_info_callbacks(&kvm_guest_cbs);
>
> It certainly compiles here.
>
> M.
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