[PATCH 5/8] drivers/perf: hisi: Update DDRC PMU for programable counter
John Garry
john.garry at huawei.com
Tue Jan 26 07:33:27 EST 2021
On 31/12/2020 06:19, Shaokun Zhang wrote:
> DDRC PMU's events are useful for performance profiling, but the events
> are limited and counter is fixed. On HiSilicon Hip09 platform, PMU
> counters are the programable and more events are supported. Let's
programmable
> add the DDRC PMU v2 driver.
>
> Cc: Mark Rutland <mark.rutland at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Cc: John Garry <john.garry at huawei.com>
> Cc: Jonathan Cameron <Jonathan.Cameron at huawei.com>
> Co-developed-by: Qi Liu <liuqi115 at huawei.com>
> Signed-off-by: Qi Liu <liuqi115 at huawei.com>
> Signed-off-by: Shaokun Zhang <zhangshaokun at hisilicon.com>
> ---
> drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 208 ++++++++++++++++++++++++--
> drivers/perf/hisilicon/hisi_uncore_pmu.h | 2 +
> 2 files changed, 197 insertions(+), 13 deletions(-)
>
generally looks ok, but ...
> }
> @@ -332,8 +506,16 @@ static int hisi_ddrc_pmu_probe(struct platform_device *pdev)
> return ret;
> }
>
> - name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "hisi_sccl%u_ddrc%u",
> - ddrc_pmu->sccl_id, ddrc_pmu->index_id);
> + if (ddrc_pmu->identifier >= HISI_PMU_V2)
> + name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
> + "hisi_sccl%u_ddrc%u_%u",
> + ddrc_pmu->sccl_id, ddrc_pmu->index_id,
> + ddrc_pmu->sub_id);
I don't think perf can support event aliasing in this format
(hisi_scclX_Y_Z), but I need to double-check.
> + else
> + name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
> + "hisi_sccl%u_ddrc%u", ddrc_pmu->sccl_id,
> + ddrc_pmu->index_id);
> +
> ddrc_pmu->pmu = (struct pmu) {
> .name = name,
> .module = THIS_MODULE,
> @@ -346,7 +528,7 @@ static int hisi_ddrc_pmu_probe(struct platform_device *pdev)
> .start = hisi_uncore_pmu_start,
> .stop = hisi_uncore_pmu_stop,
> .read = hisi_uncore_pmu_read,
> - .attr_groups = hisi_ddrc_pmu_v1_attr_groups,
> + .attr_groups = ddrc_pmu->pmu_events.attr_groups,
> .capabilities = PERF_PMU_CAP_NO_EXCLUDE,
> };
>
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