[PATCH v3 18/21] dt-bindings: allwinner: Add H616 compatible strings
Andre Przywara
andre.przywara at arm.com
Mon Jan 25 06:59:32 EST 2021
On Sun, 17 Jan 2021 22:28:47 -0600
Samuel Holland <samuel at sholland.org> wrote:
Hi,
> On 1/17/21 8:08 PM, Andre Przywara wrote:
> > Add simple "allwinner,sun50i-h616-xxx" compatible names to existing
> > bindings, and pair them with an existing fallback compatible string,
> > as the devices are compatible.
> > This covers I2C, infrared, RTC and SPI.
> >
> > Use enums to group all compatible devices together.
> >
> > Signed-off-by: Andre Przywara <andre.przywara at arm.com>
> > Acked-by: Rob Herring <robh at kernel.org>
> > Acked-by: Wolfram Sang <wsa at kernel.org> # for I2C
> > ---
> > .../bindings/i2c/marvell,mv64xxx-i2c.yaml | 21 +++++++------------
> > .../media/allwinner,sun4i-a10-ir.yaml | 16 ++++++--------
> > .../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 3 +++
> > .../bindings/spi/allwinner,sun6i-a31-spi.yaml | 1 +
> > 4 files changed, 17 insertions(+), 24 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
> > index 5b5ae402f97a..eb72dd571def 100644
> > --- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
> > +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml
> > @@ -18,21 +18,14 @@ properties:
> > - const: allwinner,sun4i-a10-i2c
> > - const: allwinner,sun6i-a31-i2c
> > - items:
> > - - const: allwinner,sun8i-a23-i2c
> > + - enum:
> > + - allwinner,sun8i-a23-i2c
> > + - allwinner,sun8i-a83t-i2c
> > + - allwinner,sun50i-a64-i2c
> > + - allwinner,sun50i-a100-i2c
> > + - allwinner,sun50i-h6-i2c
> > + - allwinner,sun50i-h616-i2c
> > - const: allwinner,sun6i-a31-i2c
> > - - items:
> > - - const: allwinner,sun8i-a83t-i2c
> > - - const: allwinner,sun6i-a31-i2c
> > - - items:
> > - - const: allwinner,sun50i-a64-i2c
> > - - const: allwinner,sun6i-a31-i2c
> > - - items:
> > - - const: allwinner,sun50i-a100-i2c
> > - - const: allwinner,sun6i-a31-i2c
> > - - items:
> > - - const: allwinner,sun50i-h6-i2c
> > - - const: allwinner,sun6i-a31-i2c
> > -
> > - const: marvell,mv64xxx-i2c
> > - const: marvell,mv78230-i2c
> > - const: marvell,mv78230-a0-i2c
> > diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > index 5fa19d4aeaf3..6d8395d6bca0 100644
> > --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml
> > @@ -20,16 +20,12 @@ properties:
> > - const: allwinner,sun5i-a13-ir
> > - const: allwinner,sun6i-a31-ir
> > - items:
> > - - const: allwinner,sun8i-a83t-ir
> > - - const: allwinner,sun6i-a31-ir
> > - - items:
> > - - const: allwinner,sun8i-r40-ir
> > - - const: allwinner,sun6i-a31-ir
> > - - items:
> > - - const: allwinner,sun50i-a64-ir
> > - - const: allwinner,sun6i-a31-ir
> > - - items:
> > - - const: allwinner,sun50i-h6-ir
> > + - enum:
> > + - allwinner,sun8i-a83t-ir
> > + - allwinner,sun8i-r40-ir
> > + - allwinner,sun50i-a64-ir
> > + - allwinner,sun50i-h6-ir
> > + - allwinner,sun50i-h616-ir
> > - const: allwinner,sun6i-a31-ir
> >
> > reg:
> > diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> > index 37c2a601c3fa..97928efd2bc9 100644
> > --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> > +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml
> > @@ -26,6 +26,9 @@ properties:
> > - const: allwinner,sun50i-a64-rtc
> > - const: allwinner,sun8i-h3-rtc
> > - const: allwinner,sun50i-h6-rtc
> > + - items:
> > + - const: allwinner,sun50i-h616-rtc
> > + - const: allwinner,sun50i-h6-rtc
>
> Since H6, the RTC manages the 24 MHz DCXO, so it provides a fourth clock
> output. If this is easy to change later, then it is fine for now, but
> maybe it is better to get the H616 binding correct from the beginning?
So you mean that RTC register +0x160 controls the system HOSC clock,
so the main input clock for all the PLLs and other clocks? And by
clearing bit 1 in there we can stop this?
And if that is the case, do you suggest that we should model this in
the DT, so that the fixed-clock "<&osc24M>" should be replaced with
"<&rtc 3>"?
So from a "the DT describes the hardware" point of view that would
probably the right way, but not sure if Linux is happy about that. At
the very least that would mean to extend the RTC driver to export a
fourth clock, and all devices would now depend on the RTC (also for
probing!). And Linux can realistically never turn that clock off
anyway (without grinding to a halt), so this register is more useful
for ARISC firmware?
So I am somewhat undecided: changing this for the H6 would make newer
DTs unusable on older kernels, without anything we really gain. When
we really want this, we should indeed use the opportunity to
introduce this at least for the H616 from day one, to avoid this
situation here.
But this requires more changes than just the binding, doesn't it?
Cheers,
Andre
>
> > reg:
> > maxItems: 1
> > diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
> > index 7866a655d81c..908248260afa 100644
> > --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
> > +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
> > @@ -25,6 +25,7 @@ properties:
> > - enum:
> > - allwinner,sun8i-r40-spi
> > - allwinner,sun50i-h6-spi
> > + - allwinner,sun50i-h616-spi
> > - const: allwinner,sun8i-h3-spi
> >
> > reg:
> >
>
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