[PATCH 1/3] drivers: firmware: Add Pdi load API support
Moritz Fischer
mdf at kernel.org
Sat Jan 23 18:35:06 EST 2021
On Mon, Jan 18, 2021 at 08:13:16AM +0530, Nava kishore Manne wrote:
> This patch adds load pdi api support to enable pdi/partial loading from
> linux. Programmable Device Image (PDI) is combination of headers, images
> and bitstream files to be loaded. Partial PDI is partial set of image/
> images to be loaded.
>
> Signed-off-by: Nava kishore Manne <nava.manne at xilinx.com>
> ---
> drivers/firmware/xilinx/zynqmp.c | 17 +++++++++++++++++
> include/linux/firmware/xlnx-zynqmp.h | 9 +++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index 7eb9958662dd..a466225b9f9e 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -897,6 +897,23 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
> }
> EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
>
> +/**
> + * zynqmp_pm_load_pdi - Load and process pdi
Nit: Is it pdi or PDI. Pick one :)
> + * @src: Source device where PDI is located
> + * @address: Pdi src address
> + *
> + * This function provides support to load pdi from linux
> + *
> + * Return: Returns status, either success or error+reason
> + */
> +int zynqmp_pm_load_pdi(const u32 src, const u64 address)
> +{
> + return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
> + lower_32_bits(address),
> + upper_32_bits(address), 0, NULL);
> +}
> +EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
> +
> /**
> * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
> * AES-GCM core.
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 2a0da841c942..87114ee645b1 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -52,6 +52,9 @@
> #define ZYNQMP_PM_CAPABILITY_WAKEUP 0x4U
> #define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U
>
> +/* Loader commands */
> +#define PM_LOAD_PDI 0x701
> +
> /*
> * Firmware FPGA Manager flags
> * XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
> @@ -354,6 +357,7 @@ int zynqmp_pm_write_pggs(u32 index, u32 value);
> int zynqmp_pm_read_pggs(u32 index, u32 *value);
> int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype);
> int zynqmp_pm_set_boot_health_status(u32 value);
> +int zynqmp_pm_load_pdi(const u32 src, const u64 address);
> #else
> static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void)
> {
> @@ -538,6 +542,11 @@ static inline int zynqmp_pm_set_boot_health_status(u32 value)
> {
> return -ENODEV;
> }
> +
> +static inline int zynqmp_pm_load_pdi(const u32 src, const u64 address)
> +{
> + return -ENODEV;
> +}
> #endif
>
> #endif /* __FIRMWARE_ZYNQMP_H__ */
> --
> 2.18.0
>
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