[PATCH v2 08/12] arm64: dts: zynqmp: Wire arasan nand controller
Michal Simek
michal.simek at xilinx.com
Thu Jan 21 05:26:56 EST 2021
Add missing arasan controller with clocks. Disable it by default. Every
board can enable it with specifying others properties.
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---
Changes in v2: None
arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 4 ++++
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 12 ++++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index c94c3bb67edc..7af57619436d 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -116,6 +116,10 @@ &lpd_dma_chan8 {
clocks = <&zynqmp_clk ADMA_REF>, <&zynqmp_clk LPD_LSBUS>;
};
+&nand0 {
+ clocks = <&zynqmp_clk NAND_REF>, <&zynqmp_clk LPD_LSBUS>;
+};
+
&gem0 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
<&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 31c6943c6217..19b349f00ce7 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -462,6 +462,18 @@ mc: memory-controller at fd070000 {
interrupts = <0 112 4>;
};
+ nand0: nand-controller at ff100000 {
+ compatible = "xlnx,zynqmp-nand-controller", "arasan,nfc-v3p10";
+ status = "disabled";
+ reg = <0x0 0xff100000 0x0 0x1000>;
+ clock-names = "controller", "bus";
+ interrupt-parent = <&gic>;
+ interrupts = <0 14 4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains = <&zynqmp_firmware PD_NAND>;
+ };
+
gem0: ethernet at ff0b0000 {
compatible = "cdns,zynqmp-gem", "cdns,gem";
status = "disabled";
--
2.30.0
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