[PATCH v3 3/4] arm64: mte: Enable async tag check fault
Vincenzo Frascino
vincenzo.frascino at arm.com
Mon Jan 18 08:37:35 EST 2021
On 1/18/21 12:57 PM, Catalin Marinas wrote:
>> +#ifdef CONFIG_KASAN_HW_TAGS
>> +void mte_check_tfsr_el1_no_sync(void)
>> +{
>> + u64 tfsr_el1;
>> +
>> + if (!system_supports_mte())
>> + return;
>> +
>> + tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1);
>> +
>> + /*
>> + * The kernel should never hit the condition TF0 == 1
>> + * at this point because for the futex code we set
>> + * PSTATE.TCO.
>> + */
>> + WARN_ON(tfsr_el1 & SYS_TFSR_EL1_TF0);
> I'd change this to a WARN_ON_ONCE() in case we trip over this due to
> model bugs etc. and it floods the log.
>
I will merge yours and Mark's comment using WARN_ONCE() here. Did not think of
potential bug in the model and you are completely right.
>> + if (tfsr_el1 & SYS_TFSR_EL1_TF1) {
>> + write_sysreg_s(0, SYS_TFSR_EL1);
>> + isb();
> While in general we use ISB after a sysreg update, I haven't convinced
> myself it's needed here. There's no side-effect to updating this reg and
> a subsequent TFSR access should see the new value.
Why there is no side-effect?
> If a speculated load is allowed to update this reg, we'd probably need an
> ISB+DSB (I don't think it does, something to check with the architects).
>
I will check this with the architects and let you know.
--
Regards,
Vincenzo
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