[PATCH] kvm: arm64: Properly align the end address of table walk

Keqian Zhu zhukeqian1 at huawei.com
Sun Jan 17 20:18:51 EST 2021



On 2021/1/15 18:23, Will Deacon wrote:
> On Fri, Jan 15, 2021 at 05:53:07PM +0800, Keqian Zhu wrote:
>> When align the end address, ought to use its original value.
>>
>> Fixes: b1e57de62cfb ("KVM: arm64: Add stand-alone page-table walker infrastructure")
>> Signed-off-by: Keqian Zhu <zhukeqian1 at huawei.com>
>> ---
>>  arch/arm64/kvm/hyp/pgtable.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
>> index bdf8e55ed308..670b0ef12440 100644
>> --- a/arch/arm64/kvm/hyp/pgtable.c
>> +++ b/arch/arm64/kvm/hyp/pgtable.c
>> @@ -296,7 +296,7 @@ int kvm_pgtable_walk(struct kvm_pgtable *pgt, u64 addr, u64 size,
>>  	struct kvm_pgtable_walk_data walk_data = {
>>  		.pgt	= pgt,
>>  		.addr	= ALIGN_DOWN(addr, PAGE_SIZE),
>> -		.end	= PAGE_ALIGN(walk_data.addr + size),
>> +		.end	= PAGE_ALIGN(addr + size),
>>  		.walker	= walker,
> 
> Hmm, this is a change in behaviour, no (consider the case where both 'addr'
> and 'size' are misaligned)? The current code is consistent with the
> kerneldoc in asm/kvm_pgtable.h, so I don't see the motivation to change it.
> 
> Did you hit a bug somewhere?
> 
> Will
> .
>
Not hit a bug, I just read the code to implement a new idea of stage2 DBM
support [1]. Yes, according to doc, this is not an issue ("The offset of
@addr within a page is ignored."). Sorry to disturb ;-).

[1] https://lore.kernel.org/kvmarm/fd26654b-8258-061c-2a69-90b961c1c71b@huawei.com/

Thanks,
Keqian








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