[PATCH V2 11/11] dts: bindings: Document device tree bindings for Arm TRBE

[Anshuman Khandual]

From: Suzuki K Poulose <suzuki.poulose at arm.com>

Document the device tree bindings for Trace Buffer Extension (TRBE).

Cc: Anshuman Khandual <anshuman.khandual at arm.com>
Cc: Mathieu Poirier <mathieu.poirier at linaro.org>
Cc: Rob Herring <robh at kernel.org>
Cc: devicetree at vger.kernel.org
Signed-off-by: Suzuki K Poulose <suzuki.poulose at arm.com>
Signed-off-by: Anshuman Khandual <anshuman.khandual at arm.com>
---
 Documentation/devicetree/bindings/arm/trbe.yaml | 46 +++++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/trbe.yaml

diff --git a/Documentation/devicetree/bindings/arm/trbe.yaml b/Documentation/devicetree/bindings/arm/trbe.yaml
new file mode 100644
index 0000000..2258595
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/trbe.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+# Copyright 2021, Arm Ltd
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/arm/trbe.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: ARM Trace Buffer Extensions
+
+maintainers:
+  - Anshuman Khandual <anshuman.khandual at arm.com>
+
+description: |
+  Description of TRBE hw
+
+properties:
+  $nodename:
+    pattern: "trbe"
+  compatible:
+    items:
+      - const: arm,trace-buffer-extension
+
+  interrupts:
+    description: |
+       Exactly 1 PPI must be listed. For heterogeneous systems where
+       TRBE is only supported on a subset of the CPUs, please consult
+       the arm,gic-v3 binding for details on describing a PPI partition.
+    maxItems: 1
+
+required:
+  - compatible
+  - interrupts
+
+additionalProperties: false
+
+
+examples:
+
+ - |
+   #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+   trbe {
+     compatible = "arm,trace-buffer-extension";
+     interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
+   };
+...
-- 
2.7.4