[PATCH] [RFC] ARM: imx: add smp support for imx7d

[Marek Vasut]

On 10/26/20 3:40 PM, Shawn Guo wrote:
[...]
>> diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
>> index 72c3fcc32910..de4383aa6a08 100644
>> --- a/arch/arm/mach-imx/common.h
>> +++ b/arch/arm/mach-imx/common.h
>> @@ -84,11 +84,13 @@ void imx_set_cpu_arg(int cpu, u32 arg);
>>   void v7_secondary_startup(void);
>>   void imx_scu_map_io(void);
>>   void imx_smp_prepare(void);
>> +void imx_gpcv2_set_core1_pdn_pup_by_software(bool pdn);
> 
> Why does it need to be protected by #ifdef CONFIG_SMP?

Because the code is useless on UP system.

[...]

>> diff --git a/arch/arm/mach-imx/headsmp.S b/arch/arm/mach-imx/headsmp.S
>> index 766dbdb2ae27..fcba58be8e79 100644
>> --- a/arch/arm/mach-imx/headsmp.S
>> +++ b/arch/arm/mach-imx/headsmp.S
>> @@ -21,6 +21,15 @@ diag_reg_offset:
>>   
>>   ENTRY(v7_secondary_startup)
>>   ARM_BE8(setend be)			@ go BE8 if entered LE
>> +	mrc	p15, 0, r0, c0, c0, 0
>> +	lsl	r0, r0, #16
>> +	lsr	r0, r0, #20
>> +	/* 0xc07 is cortex A7's ID */
>> +	mov	r1, #0xc00
>> +	orr	r1, #0x7
>> +	cmp	r0, r1
>> +	beq	secondary_startup
> 
> Can we branch to 'b secondary_startup' below via some label, so that we
> have a single entry to secondary_startup?

That would make this code less efficient, wouldn't it.

[...]

>>   static int ls1021a_boot_secondary(unsigned int cpu, struct task_struct *idle)
>> diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
>> index f52f371292ac..326c7097fc25 100644
>> --- a/arch/arm/mach-imx/src.c
>> +++ b/arch/arm/mach-imx/src.c
>> @@ -12,9 +12,12 @@

[...]

>>   static void __iomem *src_base;
>>   static DEFINE_SPINLOCK(scr_lock);
>> +static bool gpr_v2;
>> +static void __iomem *gpc_base;
> 
> This is kinda a SRC driver.  I'm a bit uncomfortable to have GPC code
> dumped in here.  More importantly, will the GPC code added here have
> any race condition with GPCv2 driver (drivers/soc/imx/gpcv2.c)?

Not that I am aware of.

[...]