[linux-sunxi] [PATCH v2 0/4] Allwinner H6 RSB support

[Chen-Yu Tsai]

Hi,

On Sun, Jan 03, 2021 at 04:00:03AM -0600, Samuel Holland wrote:
> The Allwinner H6 SoC contains an RSB controller. It is almost completely
> undocumented, so it was missed when doing the initial SoC bringup.
> 
> This series adds the clock/reset, pin configuration, and device tree
> node needed to use the RSB controller. Since RSB is faster, simpler, and
> generally more reliable than the I2C controller IP in the SoC, switch to
> using it where possible.
> 
> This was tested on an Orange Pi 3 and a Pine H64 model B. This series
> does not switch the Pine H64 to use RSB, as doing so would prevent
> accessing the external RTC that shares the I2C bus.
> 
> Changes v1->v2:
>   - Put the new values at the end of the DT binding headers
> 
> Samuel Holland (4):
>   clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset
>   pinctrl: sunxi: h6-r: Add s_rsb pin functions
>   arm64: dts: allwinner: h6: Add RSB controller node
>   arm64: dts: allwinner: h6: Use RSB for AXP805 PMIC connection

I queued up patches 1, 3, and 4 locally for v5.12. Obviously this won't
work unless the pinctrl patch is also queued up, so they won't be pushed
out until that happens.

Regarding patch 3, I replaced the clock and reset macros with raw
numbers to get rid of cross-tree dependencies. The following fix
will be posted for v5.12 later on during its RC cycle.

------------------------ >8 ------------------------

commit 0b4781666adc5e19c4d4fb4a2bff33883181cc39
Author: Chen-Yu Tsai <wens at csie.org>
Date:   Mon Jan 4 16:19:17 2021 +0800

    arm64: dts: allwinner: h6: Switch to macros for RSB clock/reset indices
    
    The macros for the clock and reset indices for the RSB hardware block
    were replaced with raw numbers when the RSB controller node was added.
    This was done to avoid cross-tree dependencies.
    
    Now that both the clk and DT changes have been merged, we can switch
    back to using the macros.
    
    Signed-off-by: Chen-Yu Tsai <wens at csie.org>

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index d897697849d6..b043beea8e6e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -988,9 +988,9 @@ r_rsb: rsb at 7083000 {
 			compatible = "allwinner,sun8i-a23-rsb";
 			reg = <0x07083000 0x400>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&r_ccu 13>;
+			clocks = <&r_ccu CLK_R_APB2_RSB>;
 			clock-frequency = <3000000>;
-			resets = <&r_ccu 7>;
+			resets = <&r_ccu RST_R_APB2_RSB>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&r_rsb_pins>;
 			status = "disabled";
------------------------ >8 ------------------------

> 
>  .../dts/allwinner/sun50i-h6-beelink-gs1.dts   | 38 +++++++++----------
>  .../dts/allwinner/sun50i-h6-orangepi-3.dts    | 14 +++----
>  .../dts/allwinner/sun50i-h6-orangepi.dtsi     | 22 +++++------
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  | 19 ++++++++++
>  drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c        |  5 +++
>  drivers/clk/sunxi-ng/ccu-sun50i-h6-r.h        |  2 +-
>  drivers/pinctrl/sunxi/pinctrl-sun50i-h6-r.c   |  2 +
>  include/dt-bindings/clock/sun50i-h6-r-ccu.h   |  2 +
>  include/dt-bindings/reset/sun50i-h6-r-ccu.h   |  1 +
>  9 files changed, 67 insertions(+), 38 deletions(-)
> 
> -- 
> 2.26.2
> 
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