[PATCH 2/2] ARM: dts: pynq: Add Digilent/TUL Zynq PYNQ Board

[Michal Simek]

On 27. 12. 20 20:38, Florian Klink wrote:
> This adds the DTS for the Digilent/TUL Zynq PYNQ Board(s).
> 
> They're Zynq 7000 - based boards, the Z1 is from Digilent, the Z2 from
> TUL.
> 
> They have a slightly different audio system, and a different pin header,
> but these aren't really accessible from the PS, only from the PL, so the
> DTB is the same.
> 
> Co-authored-by: Thomas Heijligen <src at posteo.de>
> Signed-off-by: Florian Klink <flokli at flokli.de>
> ---
>  arch/arm/boot/dts/Makefile      |  1 +
>  arch/arm/boot/dts/zynq-pynq.dts | 68 +++++++++++++++++++++++++++++++++
>  2 files changed, 69 insertions(+)
>  create mode 100644 arch/arm/boot/dts/zynq-pynq.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 3d1ea0b25168..aedf76dc31fe 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1309,6 +1309,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
>  	zynq-cc108.dtb \
>  	zynq-microzed.dtb \
>  	zynq-parallella.dtb \
> +	zynq-pynq.dtb \
>  	zynq-zc702.dtb \
>  	zynq-zc706.dtb \
>  	zynq-zc770-xm010.dtb \
> diff --git a/arch/arm/boot/dts/zynq-pynq.dts b/arch/arm/boot/dts/zynq-pynq.dts
> new file mode 100644
> index 000000000000..04ac0f7cdc7b
> --- /dev/null
> +++ b/arch/arm/boot/dts/zynq-pynq.dts
> @@ -0,0 +1,68 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/dts-v1/;
> +#include "zynq-7000.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> +	model = "Digilent/TUL Zynq PYNQ";
> +	compatible = "digilent,zynq-pynq", "digilent,zynq-pynq-z1", "tul,zynq-pynq", "tul,zynq-pynq-z2", "xlnx,zynq-7000";
> +
> +	aliases {
> +		ethernet0 = &gem0;
> +		serial0 = &uart0;
> +	};
> +
> +	memory at 0 {
> +		device_type = "memory";
> +		reg = <0x0 0x20000000>;
> +	};
> +
> +	chosen {
> +		bootargs = "";
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	gpio-leds {
> +		compatible = "gpio-leds";
> +
> +		ld4 {
> +			label = "zynq-pynq:green:ld4";
> +			gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
> +		};
> +	};
> +
> +	usb_phy0: phy0 {
> +		#phy-cells = <0>;
> +		compatible = "usb-nop-xceiv";
> +		reset-gpios = <&gpio0 46 GPIO_ACTIVE_LOW>;
> +	};
> +};
> +
> +&clkc {
> +	ps-clk-frequency = <50000000>;
> +};
> +
> +&gem0 {
> +	status = "okay";
> +	phy-mode = "rgmii-id";
> +	phy-handle = <&ethernet_phy>;
> +
> +	ethernet_phy: ethernet-phy at 0 {
> +		reg = <0>;
> +		device_type = "ethernet-phy";
> +	};
> +};
> +
> +&sdhci0 {
> +	status = "okay";
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> +
> +&usb0 {
> +	status = "okay";
> +	dr_mode = "host";
> +	usb-phy = <&usb_phy0>;
> +};
> 

I am ignoring this patch. There is another series which I will comment.

M


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs