[PATCH] i2c: exynos5: Preserve high speed master code

Jesper Nilsson jesper.nilsson at axis.com
Wed Feb 17 03:32:11 EST 2021


On Wed, Feb 17, 2021 at 09:07:47AM +0100, Krzysztof Kozlowski wrote:
> On Tue, Feb 16, 2021 at 11:09:33PM +0100, Marten Lindahl wrote:
> > > Any reason why not "|= MASTER_ID(i2c->adap.nr)" here instead of more
> > > expensive IO read? It's quite important because your current code will
> > > bitwise-or old I2C slave address with a new one... This should break
> > > during tests with multiple I2C slave devices, shouldn't it?
> > > 
> > 
> > You are correct. It is better to use the macro instead, and yes,
> > safer too. I only have one device that supports high speed i2c, but
> > I get your point. It could potentially break.
> > 
> > > On which HW did you test it?
> > 
> > I used an Artpec development board as master and INA230EVM board
> > as slave.
> 
> Artpec development board with? What SoC?

The ARTPEC-line of SoC:s are Axis Communications own ASICs, in the latest iteration
it's a Cortex-53 and includes instances of the exynos5 HSI2C ip.

> Best regards,
> Krzysztof

/^JN - Jesper Nilsson
-- 
               Jesper Nilsson -- jesper.nilsson at axis.com



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