[PATCH v5 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
joel at jms.id.au
Wed Feb 17 02:44:50 EST 2021
On Wed, 17 Feb 2021 at 07:40, ChiaWei Wang <chiawei_wang at aspeedtech.com> wrote:
> Hi All,
> Do you have update on this patch series?
> Aspeed has subsequent LPC module upstream plan.
> We hope that the following patches can be on the basis of the fixed LPC layout.
Andrew has expressed his support for your changes. I will take time to
closely review your proposal this week.
We will set the goal of having this rework merged for the next merge window.
> > -----Original Message-----
> > From: Andrew Jeffery <andrew at aj.id.au>
> > Sent: Wednesday, January 27, 2021 8:25 AM
> > To: Lee Jones <lee.jones at linaro.org>
> > Subject: Re: [PATCH v5 1/5] dt-bindings: aspeed-lpc: Remove LPC partitioning
> > On Thu, 14 Jan 2021, at 23:46, Chia-Wei, Wang wrote:
> > > The LPC controller has no concept of the BMC and the Host partitions.
> > > This patch fixes the documentation by removing the description on LPC
> > > partitions. The register offsets illustrated in the DTS node examples
> > > are also fixed to adapt to the LPC DTS change.
> > >
> > > Signed-off-by: Chia-Wei, Wang <chiawei_wang at aspeedtech.com>
> > Any thoughts Lee? If you ack it would you be happy for the patch to go through
> > the Aspeed tree?
> > Andrew
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