[PATCH v2 2/3] dt-bindings: fpga: Add binding doc for versal fpga manager

[Rob Herring]

On Thu, 11 Feb 2021 11:35:31 +0530, Nava kishore Manne wrote:
> From: Appana Durga Kedareswara rao <appana.durga.rao at xilinx.com>
> 
> This patch adds binding doc for versal fpga manager driver.
> 
> Signed-off-by: Nava kishore Manne <nava.manne at xilinx.com>
> Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao at xilinx.com>
> ---
> Changes for v2:
>                 -Fixed file format and syntax issues.
> 
>  .../bindings/fpga/xlnx,versal-fpga.yaml       | 33 +++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:
./Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml:12:14: [warning] too many spaces after colon (colons)
./Documentation/devicetree/bindings/fpga/xlnx,versal-fpga.yaml:20:9: [warning] wrong indentation: expected 10 but found 8 (indentation)

dtschema/dtc warnings/errors:

See https://patchwork.ozlabs.org/patch/1439305

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.