[PATCH] arm64: Extend workaround for erratum 1024718 to all versions of Cortex-A55

[Will Deacon]

Hi Suzuki,

On Wed, Feb 03, 2021 at 11:00:57PM +0000, Suzuki K Poulose wrote:
> The erratum 1024718 affects Cortex-A55 r0p0 to r2p0. However
> we apply the work around for r0p0 - r1p0. Unfortunately this
> won't be fixed for the future revisions for the CPU. Thus
> extend the work around for all versions of A55, to cover
> for r2p0 and any future revisions.
> 
> Cc: stable at vger.kernel.org
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Cc: James Morse <james.morse at arm.com>
> Cc: Kunihiko Hayashi <hayashi.kunihiko at socionext.com>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose at arm.com>
> ---
>  arch/arm64/kernel/cpufeature.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> index e99eddec0a46..db400ca77427 100644
> --- a/arch/arm64/kernel/cpufeature.c
> +++ b/arch/arm64/kernel/cpufeature.c
> @@ -1455,7 +1455,7 @@ static bool cpu_has_broken_dbm(void)
>  	/* List of CPUs which have broken DBM support. */
>  	static const struct midr_range cpus[] = {
>  #ifdef CONFIG_ARM64_ERRATUM_1024718
> -		MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0),  // A55 r0p0 -r1p0
> +		MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),

I think we have bigger problems with this erratum, since cpu_has_hw_af()
doesn't taken this erratum into account at all, meaning that
arch_faults_on_old_pte() will return the wrong value on any system with an
A55.

Please can you fix that along with this patch? You'll need to pay extra
attention to the stuff I've queued on for-next/faultaround, where we will
actually want arch_wants_old_prefaulted_pte() to return 'true' if any of the
CPUs have DBM, since it's a pure performance thing.

Cheers,

Will