[PATCH v2 5/8] drivers/perf: hisi: Update DDRC PMU for programable counter

[Mark Rutland]

On Wed, Feb 03, 2021 at 03:51:05PM +0800, Shaokun Zhang wrote:
> DDRC PMU's events are useful for performance profiling, but the events
> are limited and counters are fixed. On HiSilicon Hip09 platform, PMU
> counters are the programmable and more events are supported. Let's
> add the DDRC PMU v2 driver.

>  static struct attribute *hisi_ddrc_pmu_v1_events_attr[] = {
>  	HISI_PMU_EVENT_ATTR(flux_wr,		0x00),
>  	HISI_PMU_EVENT_ATTR(flux_rd,		0x01),
> @@ -240,6 +370,18 @@ static const struct attribute_group hisi_ddrc_pmu_v1_events_group = {
>  	.attrs = hisi_ddrc_pmu_v1_events_attr,
>  };
>  
> +static struct attribute *hisi_ddrc_pmu_v2_events_attr[] = {
> +	HISI_PMU_EVENT_ATTR(clocks,		0x00),

Should that be 'cycles' ?

> +	HISI_PMU_EVENT_ATTR(flux_wr,		0x83),
> +	HISI_PMU_EVENT_ATTR(flux_rd,		0x84),
> +	NULL
> +};

The commit message mentioned that v2 supports more events, but this only
adds three of them (and v2 listed eight distinct events).

Is there a rationale for only listing these events specifically?

Thanks,
Mark.