[PATCH] ARM: dts: ixp4xx: Fix up the Netgear WG302 device tree

[Linus Walleij]

The version we can support (because of access to the hardware)
is WG302v1, so rename the file and make the following
modifications:

- We have 32MB memory not 16MB
- The default console speed is 9600 baud so use this
- The device has no ATA disk nor USB so drop the /dev/sda1
  default mount, this needs to mount ramdisk or NFS
- Both serial0 and serial1 cannot be assigned with aliases,
  just assign serial0
- The Flash is just 8MB so augment the size
- The Flash FIS index is at eraseblock 0x3f
- The PHY is at MDIO address 30

Tested by bringing the Netgear WG302v1 up to userspace using
initramfs appended to the kernel and downloaded over TFTP,
then ifconfig to bring up eth0 and pinging the host. All
works fine including SSH into the device from the host.

Cc: Zoltan HERPAI <wigyori at uid0.hu>
Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
---
Zoltan: please check if some of these changes makes GW7001
come up as well.
---
 arch/arm/boot/dts/Makefile                    |  2 +-
 ...2.dts => intel-ixp42x-netgear-wg302v1.dts} | 29 +++++++++----------
 2 files changed, 15 insertions(+), 16 deletions(-)
 rename arch/arm/boot/dts/{intel-ixp42x-netgear-wg302v2.dts => intel-ixp42x-netgear-wg302v1.dts} (77%)

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7dfda6be2916..4b1f47a60a84 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -268,7 +268,7 @@ dtb-$(CONFIG_ARCH_IXP4XX) += \
 	intel-ixp42x-dlink-dsm-g600.dtb \
 	intel-ixp42x-gateworks-gw2348.dtb \
 	intel-ixp43x-gateworks-gw2358.dtb \
-	intel-ixp42x-netgear-wg302v2.dtb \
+	intel-ixp42x-netgear-wg302v1.dtb \
 	intel-ixp42x-arcom-vulcan.dtb \
 	intel-ixp42x-gateway-7001.dtb
 dtb-$(CONFIG_ARCH_KEYSTONE) += \
diff --git a/arch/arm/boot/dts/intel-ixp42x-netgear-wg302v2.dts b/arch/arm/boot/dts/intel-ixp42x-netgear-wg302v1.dts
similarity index 77%
rename from arch/arm/boot/dts/intel-ixp42x-netgear-wg302v2.dts
rename to arch/arm/boot/dts/intel-ixp42x-netgear-wg302v1.dts
index a57009436ed8..df2ca6d95ee5 100644
--- a/arch/arm/boot/dts/intel-ixp42x-netgear-wg302v2.dts
+++ b/arch/arm/boot/dts/intel-ixp42x-netgear-wg302v1.dts
@@ -10,26 +10,26 @@
 #include <dt-bindings/input/input.h>
 
 / {
-	model = "Netgear WG302 v2";
-	compatible = "netgear,wg302v2", "intel,ixp42x";
+	model = "Netgear WG302 v1";
+	compatible = "netgear,wg302v1", "intel,ixp42x";
 	#address-cells = <1>;
 	#size-cells = <1>;
 
 	memory at 0 {
-		/* 16 MB SDRAM according to OpenWrt database */
+		/* 32 MB SDRAM according to boot arguments */
 		device_type = "memory";
-		reg = <0x00000000 0x01000000>;
+		reg = <0x00000000 0x02000000>;
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
-		stdout-path = "uart1:115200n8";
+		/* The RedBoot comes up in 9600 baud so let's keep this */
+		bootargs = "console=ttyS0,9600n8";
+		stdout-path = "uart1:9600n8";
 	};
 
 	aliases {
 		/* These are switched around */
 		serial0 = &uart1;
-		serial1 = &uart0;
 	};
 
 	soc {
@@ -38,18 +38,17 @@ flash at 0,0 {
 				compatible = "intel,ixp4xx-flash", "cfi-flash";
 				bank-width = <2>;
 				/*
-				 * 32 MB of Flash in 128 0x20000 sized blocks
-				 * mapped in at CS0 and CS1
+				 * 8 MB of Flash in 64 0x20000 sized blocks
+				 * mapped in at CS0.
 				 */
-				reg = <0 0x00000000 0x2000000>;
+				reg = <0 0x00000000 0x800000>;
 
 				/* Configure expansion bus to allow writes */
 				intel,ixp4xx-eb-write-enable = <1>;
 
 				partitions {
 					compatible = "redboot-fis";
-					/* CHECKME: guess this is Redboot FIS */
-					fis-index-block = <0xff>;
+					fis-index-block = <0x3f>;
 				};
 			};
 		};
@@ -82,14 +81,14 @@ ethernet at c8009000 {
 			queue-rx = <&qmgr 3>;
 			queue-txready = <&qmgr 20>;
 			phy-mode = "rgmii";
-			phy-handle = <&phy8>;
+			phy-handle = <&phy30>;
 
 			mdio {
 				#address-cells = <1>;
 				#size-cells = <0>;
 
-				phy8: ethernet-phy at 8 {
-					reg = <8>;
+				phy30: ethernet-phy at 30 {
+					reg = <30>;
 				};
 			};
 		};
-- 
2.31.1