[PATCH 0/6] cacheinfo: CPU affinity and Devicetree 'id' support
Greg Kroah-Hartman
gregkh at linuxfoundation.org
Tue Dec 21 01:31:22 PST 2021
On Thu, Dec 16, 2021 at 05:31:19PM -0600, Rob Herring wrote:
> For upcoming Arm MPAM support in resctrl, it is necessary to have the
> cacheinfo 'id' for MPAM enabled caches. The 'id' is part of the resctrl
> ABI. While this support already exists for ACPI based systems, it is
> missing for DT. This series adds the support.
>
> The 'id' value used is the smallest CPU h/w id value associated with a
> cache. This requires walking the cache hierarchy from every CPU node to
> get all CPUs associated with a cache. As MPAM also needs to know this,
> the CPU affinity is also saved to avoid reimplementing and walking the
> firmware tables again.
>
> Patches 1 and 2 are v2 from the prior series[1]. The rest are new.
>
> Tested on arm64 with DT. ACPI changes are untested. I don't have a
> system with an appropriate PPTT nor do I know how to modify ACPI tables.
>
> Rob
>
> [1] https://lore.kernel.org/all/20211006164332.1981454-1-robh@kernel.org/
>
> Rob Herring (6):
> cacheinfo: Allow for >32-bit cache 'id'
> cacheinfo: Set cache 'id' based on DT data
> cacheinfo: Add cpu_affinity_map to store affinity for all CPUs
> ACPI / PPTT: Populate the cacheinfo.cpu_affinity_map
> cacheinfo: Use cpu_affinity_map for populating shared_cpu_map
> cacheinfo: Add cacheinfo_get_cache_affinity() function
>
> drivers/acpi/pptt.c | 29 +++++++++++++++--
> drivers/base/cacheinfo.c | 65 ++++++++++++++++++++++++++-------------
> include/linux/cacheinfo.h | 29 +++++++++++++++--
> 3 files changed, 97 insertions(+), 26 deletions(-)
>
> --
> 2.32.0
>
Acked-by: Greg Kroah-Hartman <gregkh at linuxfoundation.org>
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