[PATCH v5 18/69] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg()

Marc Zyngier maz at kernel.org
Tue Dec 21 00:39:58 PST 2021


On Tue, 21 Dec 2021 07:12:36 +0000,
Ganapatrao Kulkarni <gankulkarni at os.amperecomputing.com> wrote:
> 
> 
> 
> On 20-12-2021 02:40 pm, Marc Zyngier wrote:
> > On Mon, 20 Dec 2021 07:04:44 +0000,
> > Ganapatrao Kulkarni <gankulkarni at os.amperecomputing.com> wrote:
> >> 
> >> 
> >> On 30-11-2021 01:30 am, Marc Zyngier wrote:
> >>> KVM internally uses accessor functions when reading or writing the
> >>> guest's system registers. This takes care of accessing either the stored
> >>> copy or using the "live" EL1 system registers when the host uses VHE.
> >>> 
> >>> With the introduction of virtual EL2 we add a bunch of EL2 system
> >>> registers, which now must also be taken care of:
> >>> - If the guest is running in vEL2, and we access an EL1 sysreg, we must
> >>>     revert to the stored version of that, and not use the CPU's copy.
> >>> - If the guest is running in vEL1, and we access an EL2 sysreg, we must
> >> 
> >> Do we have vEL1? or is it a typo?
> > 
> > Not a typo, but only a convention (there is no such concept in the
> > architecture). vELx denotes the exception level the guest thinks it is
> > running at while running at EL1 (as it is the case for both vEL1 and
> > vEL2).
> > 
> 
> OK got it, this is to deal with Non-VHE case.

No, you'd have the exact same thing with a VHE guest itself running an
EL1 guest. You really cannot distinguish the two cases.

In general, you can't really think the NV support in terms of VHE or
nVHE, or even in terms of guest level. You need to think in terms of a
single machine with three exception levels, and follow the rules of
the architecture to the letter.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.



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