[PATCH] Revert "pinctrl: stm32: fix the reported number of GPIO lines per bank"
Fabien DESSENNE
fabien.dessenne at foss.st.com
Tue Dec 14 06:17:47 PST 2021
Hi Christoph
I have been able to reproduce the issue you reported.
Instead of reverting the guilty patch, I am working to fix it.
I am currently testing a candidate patch, and will share it in the
coming days.
BR
Fabien
On 11/12/2021 19:53, Christoph Fritz wrote:
> This reverts commit 67e2996f72c71ebe4ac2fcbcf77e54479bb7aa11 because it
> breaks pin usage for gpio-nodes with an offset in gpio-ranges (like
> &gpiof from stm32mp15xxab-pinctrl.dtsi).
>
> For example the following reset gpio of a wifi module on a stm32mp153c
> board works again after applying this revert patch:
>
> wifi_pwrseq: wifi-pwrseq {
> compatible = "mmc-pwrseq-simple";
> reset-gpios = <&gpiof 9 GPIO_ACTIVE_LOW>;
> };
>
> Signed-off-by: Christoph Fritz <chf.fritz at googlemail.com>
> ---
> drivers/pinctrl/stm32/pinctrl-stm32.c | 9 ++-------
> 1 file changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
> index 24764ebcc936..73f49c596cef 100644
> --- a/drivers/pinctrl/stm32/pinctrl-stm32.c
> +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
> @@ -1225,7 +1225,7 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
> struct device *dev = pctl->dev;
> struct resource res;
> int npins = STM32_GPIO_PINS_PER_BANK;
> - int bank_nr, err, i = 0;
> + int bank_nr, err;
>
> if (!IS_ERR(bank->rstc))
> reset_control_deassert(bank->rstc);
> @@ -1247,14 +1247,9 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
>
> of_property_read_string(np, "st,bank-name", &bank->gpio_chip.label);
>
> - if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, i, &args)) {
> + if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args)) {
> bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
> bank->gpio_chip.base = args.args[1];
> -
> - npins = args.args[2];
> - while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
> - ++i, &args))
> - npins += args.args[2];
> } else {
> bank_nr = pctl->nbanks;
> bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;
>
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